A Dynamic-Key Secure Scan Structure Against Scan-Based Side Channel and Memory Cold Boot Attacks

Chia Chi Wu, Man Hsuan Kuo, Kuen Jong Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Scan design is a universal design for test (DFT) technology to increase the observability and controllability of the circuits under test by using scan chains. However, it also leads to a potential security problem that attackers can use scan design as a backdoor to extract confidential information. Researchers have tried to address this problem by using secure scan structures that usually have some keys to confirm the identities of users. However, the traditional methods to store intermediate data or keys in memory are also under high risk of being attacked. In this paper, we propose a dynamic-key secure DFT structure that can defend scan-based and memory attacks without decreasing the system performance and the testability. The main idea is to build a scan design key generator that can generate the keys dynamically instead of storing and using keys in the circuit statically. Only specific patterns derived from the original test patterns are valid to construct the keys and hence the attackers cannot shift in any other patterns to extract correct internal response from the scan chains or retrieve the keys from memory. Analysis results show that the proposed method can achieve a very high security level and the security level will not decrease no matter how many guess rounds the attackers have tried due to the dynamic nature of our method.

Original languageEnglish
Title of host publicationProceedings - 2018 IEEE 27th Asian Test Symposium, ATS 2018
PublisherIEEE Computer Society
Pages48-53
Number of pages6
ISBN (Electronic)9781538694664
DOIs
Publication statusPublished - 2018 Dec 6
Event27th IEEE Asian Test Symposium, ATS 2018 - Hefei, China
Duration: 2018 Oct 152018 Oct 18

Publication series

NameProceedings of the Asian Test Symposium
Volume2018-October
ISSN (Print)1081-7735

Other

Other27th IEEE Asian Test Symposium, ATS 2018
Country/TerritoryChina
CityHefei
Period18-10-1518-10-18

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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