A Fast and Jitter-Modulation Free Jitter Tolerance Estimation Technique for Bang-Bang CDRs

Yen Long Lee, Yu Po Cheng, Soon Jyh Chang, Hsin Wen Ting

Research output: Contribution to journalArticlepeer-review

Abstract

Editor's note: Analysis of jitter tolerance of CDR circuit is important for high-speed serial link design. This article presents a simple yet effective method for evaluating the tracking capability of CDR, which is applied to the analysis.-Youngsoo Shin, KAIST.

Original languageEnglish
Article number8039277
Pages (from-to)63-73
Number of pages11
JournalIEEE Design and Test
Volume35
Issue number1
DOIs
Publication statusPublished - 2018 Feb

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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