A fast-search motion estimation method and its VLSI architecture

Jau Ling Chen; Pei Yin Chen

A fast-search motion estimation method and its VLSI architecture

Jau Ling Chen, Pei Yin Chen

Department of Computer Science and Information Engineering

Research output: Contribution to conference › Paper › peer-review

1 Citation (Scopus)

Abstract

An efficient search algorithm for block motion estimation and its VLSI architecture are proposed in this paper. By using gray prediction, the proposed algorithm can determine the motion vectors of image blocks quickly and correctly. Our experimental results show that the algorithm performs better than other search algorithms, such as 3SS, NTSS, 4SS, SES, PS and GPS. The VLSI architecture of the algorithm has been developed, and in simulation it yields a search rate of 700K blocks/sec with a clock rate of 70 MHz.

Original language	English
Pages	164-167
Number of pages	4
Publication status	Published - 2000
Event	43rd Midwest Circuits and Systems Conference (MWSCAS-2000) - Lansing, MI, United States Duration: 2000 Aug 8 → 2000 Aug 11

Other

Other	43rd Midwest Circuits and Systems Conference (MWSCAS-2000)
Country/Territory	United States
City	Lansing, MI
Period	00-08-08 → 00-08-11

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

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title = "A fast-search motion estimation method and its VLSI architecture",

abstract = "An efficient search algorithm for block motion estimation and its VLSI architecture are proposed in this paper. By using gray prediction, the proposed algorithm can determine the motion vectors of image blocks quickly and correctly. Our experimental results show that the algorithm performs better than other search algorithms, such as 3SS, NTSS, 4SS, SES, PS and GPS. The VLSI architecture of the algorithm has been developed, and in simulation it yields a search rate of 700K blocks/sec with a clock rate of 70 MHz.",

author = "Chen, {Jau Ling} and Chen, {Pei Yin}",

year = "2000",

language = "English",

pages = "164--167",

note = "43rd Midwest Circuits and Systems Conference (MWSCAS-2000) ; Conference date: 08-08-2000 Through 11-08-2000",

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T1 - A fast-search motion estimation method and its VLSI architecture

AU - Chen, Jau Ling

AU - Chen, Pei Yin

PY - 2000

Y1 - 2000

N2 - An efficient search algorithm for block motion estimation and its VLSI architecture are proposed in this paper. By using gray prediction, the proposed algorithm can determine the motion vectors of image blocks quickly and correctly. Our experimental results show that the algorithm performs better than other search algorithms, such as 3SS, NTSS, 4SS, SES, PS and GPS. The VLSI architecture of the algorithm has been developed, and in simulation it yields a search rate of 700K blocks/sec with a clock rate of 70 MHz.

AB - An efficient search algorithm for block motion estimation and its VLSI architecture are proposed in this paper. By using gray prediction, the proposed algorithm can determine the motion vectors of image blocks quickly and correctly. Our experimental results show that the algorithm performs better than other search algorithms, such as 3SS, NTSS, 4SS, SES, PS and GPS. The VLSI architecture of the algorithm has been developed, and in simulation it yields a search rate of 700K blocks/sec with a clock rate of 70 MHz.

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UR - http://www.scopus.com/inward/citedby.url?scp=0034464304&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:0034464304

SP - 164

EP - 167

T2 - 43rd Midwest Circuits and Systems Conference (MWSCAS-2000)

Y2 - 8 August 2000 through 11 August 2000

ER -

A fast-search motion estimation method and its VLSI architecture

Abstract

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All Science Journal Classification (ASJC) codes

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