A multipleinput signature register (MISR) computation algorithm for fast signature simulation is proposed. Based on the table lookup linear compaction algorithm and the modularity property of a singleinput signature register (SISR), some new accelerating schemespartialinput lookup tables and flyingstate lookup tablesare developed to boost the signature computation speed. Mathematical analysis and simulation results show that this algorithm has an order of magnitude speedup without extra memory requirement compared with the original linear compaction algorithm. Though this algorithm is derived for SISR, a simple conversion scheme exists that can convert internalEXOR MISR to SISR. Consequently, fast MISR signature computation can be done.
|Number of pages||10|
|Journal||IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems|
|Publication status||Published - 2000 Dec 1|
All Science Journal Classification (ASJC) codes
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering