TY - JOUR
T1 - A full code-patterns coverage high-speed embedded ROM using dynamic virtual guardian technique
AU - Chang, Meng Fan
AU - Chiou, Lih Yih
AU - Wen, Kuei Ann
PY - 2006/2
Y1 - 2006/2
N2 - Crosstalk between bitlines induces read failure and limits the coverage of applicable code-patterns for high-speed contact/via-programming read-only memories (ROMs) in SoC. Owing to the variation in bitline loading across code-patterns, the amount of coupled noise on an accessed bitline is code-pattern-dependent. This crosstalk effect worsens, with larger coupling capacitance and smaller intrinsic loading, as the technology node shrinks. This study proposes dynamic virtual guardian (DVG) techniques for contact/via-programming ROM macros and compilers to eliminate the crosstalk-induced read failure and increase the code-patterns coverage. Compared with conventional ROMs, DVG techniques achieve higher speed, lower power consumption and better design for manufacturing (DFM) capability with full code-patterns coverage. Experiments on fabricated designs, a conventional ROM and two 256 Kb DVG ROMs, using 0.18 μm 1P5M CMOS technology have demonstrated that DVG techniques achieve 100% code-pattern coverage under a small sensing margin.
AB - Crosstalk between bitlines induces read failure and limits the coverage of applicable code-patterns for high-speed contact/via-programming read-only memories (ROMs) in SoC. Owing to the variation in bitline loading across code-patterns, the amount of coupled noise on an accessed bitline is code-pattern-dependent. This crosstalk effect worsens, with larger coupling capacitance and smaller intrinsic loading, as the technology node shrinks. This study proposes dynamic virtual guardian (DVG) techniques for contact/via-programming ROM macros and compilers to eliminate the crosstalk-induced read failure and increase the code-patterns coverage. Compared with conventional ROMs, DVG techniques achieve higher speed, lower power consumption and better design for manufacturing (DFM) capability with full code-patterns coverage. Experiments on fabricated designs, a conventional ROM and two 256 Kb DVG ROMs, using 0.18 μm 1P5M CMOS technology have demonstrated that DVG techniques achieve 100% code-pattern coverage under a small sensing margin.
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U2 - 10.1109/JSSC.2005.862343
DO - 10.1109/JSSC.2005.862343
M3 - Article
AN - SCOPUS:31644438897
SN - 0018-9200
VL - 41
SP - 496
EP - 506
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 2
ER -