Fuzzy logic has been successfully applied to control vague, incomplete, complex, and ill-defined systems. With the help of fuzzy inference, an efficient inter-block/inter-frame fuzzy search (IIFS) algorithm for block motion estimation is proposed. By using the inter-block and inter-frame correlations, IIFS can determine the motion vectors of image blocks quickly and correctly. However, the IIFS algorithm is not suitable for hardware implementation due to very irregular data flow. Hence, in this paper we propose a modified inter-block/inter-frame fuzzy search (MIIFS) algorithm that can be easily realized with VLSI technology. With 0.6 μm CMOS technology, the MIIFS chip has a die size of 4.1 × 4.1 mm2 and 108 K transistors. It can work with a clock rate of 67 MHz, and yield a running speed that can support the MPEG video resolution (720 pixels × 480 lines, 30 frames/s) in real time.
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering