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A hierarchical test methodology for systems on chip

  • Jin Fu Li
  • , Hsin Jung Huang
  • , Jeng Bin Chen
  • , Chih Pin Su
  • , Cheng Wen Wu
  • , Chuang Cheng
  • , Shao I. Chen
  • , Chi Yi Hwang
  • , Hsiao Ping Lin

Research output: Contribution to journalArticlepeer-review

Original languageEnglish
Pages (from-to)69-81
Number of pages13
JournalIEEE Micro
Volume22
Issue number5
DOIs
Publication statusPublished - 2002 Sept 1

All Science Journal Classification (ASJC) codes

  • Computer Graphics and Computer-Aided Design
  • Hardware and Architecture
  • Software

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