TY - GEN
T1 - A high-driving class-AB buffer amplifier with a new pseudo source follower
AU - Lu, Chih Wen
AU - Shen, Yen Chih
AU - Sheu, Meng Lieh
PY - 2007
Y1 - 2007
N2 - A high-driving class-AB buffer amplifier, which consists of a high-gain input stage and a pseudo source follower, is proposed. The pseudo source follower consists of two same types of differential pairs rather than two complementary error amplifiers. The high-driving capability is mainly provided by the folded amplifiers. An experimental prototype buffer amplifier implemented in a 0.35-μm CMOS technology demonstrates that the circuit dissipates an average static power consumption of only 660 μW at a power supply of 3.3 V, and exhibits the slew rates of 2.7 V/μs and 3.8 V/μs for the rising and falling edges, respectively, under a 300Ω/150 pF load. The second and third harmonic distortions (HD2 and HD3) are -67 dB and -65 dB, respectively, at 20 KHz under the same load.
AB - A high-driving class-AB buffer amplifier, which consists of a high-gain input stage and a pseudo source follower, is proposed. The pseudo source follower consists of two same types of differential pairs rather than two complementary error amplifiers. The high-driving capability is mainly provided by the folded amplifiers. An experimental prototype buffer amplifier implemented in a 0.35-μm CMOS technology demonstrates that the circuit dissipates an average static power consumption of only 660 μW at a power supply of 3.3 V, and exhibits the slew rates of 2.7 V/μs and 3.8 V/μs for the rising and falling edges, respectively, under a 300Ω/150 pF load. The second and third harmonic distortions (HD2 and HD3) are -67 dB and -65 dB, respectively, at 20 KHz under the same load.
UR - https://www.scopus.com/pages/publications/50149098420
UR - https://www.scopus.com/pages/publications/50149098420#tab=citedBy
U2 - 10.1109/VLSISOC.2007.4402481
DO - 10.1109/VLSISOC.2007.4402481
M3 - Conference contribution
AN - SCOPUS:50149098420
SN - 9781424417100
T3 - 2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC
SP - 105
EP - 109
BT - 2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC
T2 - 2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC
Y2 - 15 October 2007 through 17 October 2007
ER -