A high-performance unified-field reconfigurable cryptographic processor

Jun Hong Chen, Ming Der Shieh, Wen Ching Lin

Research output: Contribution to journalArticlepeer-review

26 Citations (Scopus)


With rapid increases in communication and network applications, cryptography has become a crucial issue to ensure the security of transmitted data. In this paper, we propose a microcode-based architecture with a novel reconfigurable datapath which can perform either prime field GF(p) operations or binary extension field GF(2m) operations for arbitrary prime numbers, irreducible polynomials, and precision. Using these field arithmetic units, users are capable of programming cryptographic algorithms in microcode sequences for full compliance with a majority of public-key cryptographic algorithms such as RivestShamirAdleman (RSA) and elliptic curve cryptosystems. An algorithmic optimization or refinement can thus be made at a higher level based on the reconfigurable datapath. Experimental results show that the developed processor has full cryptography algorithm flexibility, high hardware utilization, and high performance.

Original languageEnglish
Article number5325648
Pages (from-to)1145-1158
Number of pages14
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number8
Publication statusPublished - 2010 Aug

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


Dive into the research topics of 'A high-performance unified-field reconfigurable cryptographic processor'. Together they form a unique fingerprint.

Cite this