A high throughput and data reuse architecture for H.264/AVC deblocking filter

Yi Chih Chao, Ji Kun Lin, Jar-Ferr Yang, Bin-Da Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

In this paper, we propose a high throughput and data reuse architecture for de-blocking filter in H.264/AVC. There are two SRAMs exploited in the design. One is 144×32 bits single-port SRAM, and the other is 16×32 bits two-port SRAM. We use the group-of-pixel access method to store the pixels in SRAMs instead of the column-of-pixel or row-of-pixel approach. In the algorithm level, we modify the filtering order in the de-blocking filter without violating the H.264/AVC standard. Therefore, we efficiently use the data reuse skill to reduce the access frequency of SRAMs. We implement this architecture with UMC 0.18 μm cell library, and the maximum clock frequency we can achieve is 100 MHz. The simulation results show that the total number of logic gate counts is 16.6k. When the clock frequency equals 100 MHz, it can process 14619 macroblocks in 1/30 second. In other words, we achieve 4XGA (2048×1536) @30 frames/sec when we set the clock frequency to 85 MHz.

Original languageEnglish
Title of host publicationAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
Pages1260-1263
Number of pages4
DOIs
Publication statusPublished - 2006 Dec 1
EventAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems - , Singapore
Duration: 2006 Dec 42006 Dec 6

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Other

OtherAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
CountrySingapore
Period06-12-0406-12-06

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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    Chao, Y. C., Lin, J. K., Yang, J-F., & Liu, B-D. (2006). A high throughput and data reuse architecture for H.264/AVC deblocking filter. In APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems (pp. 1260-1263). [4145629] (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS). https://doi.org/10.1109/APCCAS.2006.342392