TY - GEN
T1 - A high throughput parallel AVC/H.264 context-based adaptive binary arithmetic decoder
AU - Liang, Jia Wei
AU - Lin, He Yuan
AU - Lee, Gwo Giun
PY - 2011/8/18
Y1 - 2011/8/18
N2 - In this paper, based on the proposed parallelization scheme of binary arithmetic decoding, a parallel AVC/H.264 context-based adaptive binary arithmetic coding (CABAC) decoder with high throughput is proposed. Following the top-down design methodology, algorithm analyzing and dataflow modeling in both high and low granularities are performed to achieve the proposed architecture. According to the analysis for algorithm, the similarity between CABAC decoder and Viterbi decoder is found to extend the degree of parallelism for binary arithmetic decoding. The application of proposed design is specified to support AVC/H.264 High Profile, 4.2 Level, and 1920x1088 resolution at 64 frames per second. By increasing the degree of parallelism of bin decoding, the throughput of the proposed architecture is shown by the experiments to have improved 3.5 times as compared to the sequential bin decoding, and the decoded bin per second can reach 378M at clock speed 108MHz.
AB - In this paper, based on the proposed parallelization scheme of binary arithmetic decoding, a parallel AVC/H.264 context-based adaptive binary arithmetic coding (CABAC) decoder with high throughput is proposed. Following the top-down design methodology, algorithm analyzing and dataflow modeling in both high and low granularities are performed to achieve the proposed architecture. According to the analysis for algorithm, the similarity between CABAC decoder and Viterbi decoder is found to extend the degree of parallelism for binary arithmetic decoding. The application of proposed design is specified to support AVC/H.264 High Profile, 4.2 Level, and 1920x1088 resolution at 64 frames per second. By increasing the degree of parallelism of bin decoding, the throughput of the proposed architecture is shown by the experiments to have improved 3.5 times as compared to the sequential bin decoding, and the decoded bin per second can reach 378M at clock speed 108MHz.
UR - http://www.scopus.com/inward/record.url?scp=80051654938&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=80051654938&partnerID=8YFLogxK
U2 - 10.1109/ICASSP.2011.5946835
DO - 10.1109/ICASSP.2011.5946835
M3 - Conference contribution
AN - SCOPUS:80051654938
SN - 9781457705397
T3 - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
SP - 1729
EP - 1732
BT - 2011 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2011 - Proceedings
T2 - 36th IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2011
Y2 - 22 May 2011 through 27 May 2011
ER -