A hybrid modeling technique for circuit-level simulation of InGaAs, SiGe, and ZnSe-Ge HBTs in RFIC and MPIC systems

Hsien Cheng Tseng, Jung-Hua Chou

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A hybrid modeling technique has been developed for circuit-level simulation of advanced InGaAs, SiGe, and ZnSe-Ge HBTs in RFIC as well as OEIC systems. This intelligent approach distinguishes from prior ones in reinforcing the genetic algorithm (GA) with generalized analytical formulae (GAF) to efficiently extract physically-meaningful circuit elements used in the SPICE-like simulator. An in-depth analysis of optimized and measured Sparameters from the HBTs with higher level of packaging density clearly identifies the accuracy of the proposed methodology.

Original languageEnglish
Title of host publication2006 International Microsystems, Packaging,Assembly Conference Taiwan, IMPACT - Proceedings of Technical Papers
Pages155-158
Number of pages4
DOIs
Publication statusPublished - 2006
Event2006 International Microsystems, Packaging, Assembly Conference Taiwan, IMPACT - Taipei, Taiwan
Duration: 2006 Oct 182006 Oct 20

Other

Other2006 International Microsystems, Packaging, Assembly Conference Taiwan, IMPACT
CountryTaiwan
CityTaipei
Period06-10-1806-10-20

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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