A lossless index coding algorithm and VLSI design for vector quantization

Ming Hwa Sheu, Sh Chi Tsai, Ming Der Shieh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

This paper presents a switching-tree coding (STC) algorithm to re-encode the output codevector indexes after vector quantization. Based on the connections in the index neighborhood, we construct three binary trees to allocate the optimal variable-length noiseless code for each index. Simulation results indicate that this algorithm can improve coding efficiency without introducing any extra coding distortion, as compared to conventional memoryless VQ. Besides, according the new algorithm, an efficient VLSI architecture is also derived under the requirements of low cost and high performance. The gate counts of encoder and decoder are about 5000 and 4800 respectively. After Verilog simulation, the clock rate of the whole architecture is 50 MHz by using 0.6 μm CMOS IP3M technology.

Original languageEnglish
Title of host publicationAP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages198-201
Number of pages4
ISBN (Print)0780357051, 9780780357051
DOIs
Publication statusPublished - 1999 Jan 1
Event1st IEEE Asia Pacific Conference on ASICs, AP-ASIC 1999 - Seoul, Korea, Republic of
Duration: 1999 Aug 231999 Aug 25

Publication series

NameAP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs

Other

Other1st IEEE Asia Pacific Conference on ASICs, AP-ASIC 1999
CountryKorea, Republic of
CitySeoul
Period99-08-2399-08-25

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality
  • Electronic, Optical and Magnetic Materials

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