A low-cost output response analyzer circuit for ADC BIST

Hsin Wen Ting, I. Jen Chao, Yu Chang Lien, Soon Jyh Chang, Bin Da Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

In this paper, a low-cost ADC output response analyzer (ORA) circuit for built-in self-test (BIST) application is proposed. The sine-wave histogram testing method and the basic COordinate Rotation Digital Computer (CORDIC) technique are used to design the proposed ADC ORA circuit. The ADC's static and dynamic parameters can both be obtained using the proposed circuit. The basic CORDIC based ADC ORA circuit is designed and synthesized in a 0.18-uμm technology to analyze the outputs an 8-bit ADC to verify the designs. It shows a lower area overhead compared with the Fast Fourier transform (FFT) based realization.

Original languageEnglish
Title of host publication2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09
DOIs
Publication statusPublished - 2009 Sep 17
Event2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09 - Chengdu, China
Duration: 2009 Apr 282009 Apr 29

Publication series

Name2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09

Other

Other2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09
CountryChina
CityChengdu
Period09-04-2809-04-29

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Modelling and Simulation

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