A low-cost output response analyzer circuit for ADC BIST

Hsin Wen Ting; I. Jen Chao; Yu Chang Lien; Soon Jyh Chang; Bin Da Liu

doi:10.1109/CAS-ICTD.2009.4960751

A low-cost output response analyzer circuit for ADC BIST

Hsin Wen Ting, I. Jen Chao, Yu Chang Lien, Soon Jyh Chang, Bin Da Liu

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

In this paper, a low-cost ADC output response analyzer (ORA) circuit for built-in self-test (BIST) application is proposed. The sine-wave histogram testing method and the basic COordinate Rotation Digital Computer (CORDIC) technique are used to design the proposed ADC ORA circuit. The ADC's static and dynamic parameters can both be obtained using the proposed circuit. The basic CORDIC based ADC ORA circuit is designed and synthesized in a 0.18-uμm technology to analyze the outputs an 8-bit ADC to verify the designs. It shows a lower area overhead compared with the Fast Fourier transform (FFT) based realization.

Original language	English
Title of host publication	2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09
DOIs	https://doi.org/10.1109/CAS-ICTD.2009.4960751
Publication status	Published - 2009 Sept 17
Event	2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09 - Chengdu, China Duration: 2009 Apr 28 → 2009 Apr 29

Publication series

Name	2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09

Other

Other	2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09
Country/Territory	China
City	Chengdu
Period	09-04-28 → 09-04-29

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering
Modelling and Simulation

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10.1109/CAS-ICTD.2009.4960751

Cite this

Ting, H. W., Chao, I. J., Lien, Y. C., Chang, S. J., & Liu, B. D. (2009). A low-cost output response analyzer circuit for ADC BIST. In 2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09 Article 4960751 (2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09). https://doi.org/10.1109/CAS-ICTD.2009.4960751

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title = "A low-cost output response analyzer circuit for ADC BIST",

abstract = "In this paper, a low-cost ADC output response analyzer (ORA) circuit for built-in self-test (BIST) application is proposed. The sine-wave histogram testing method and the basic COordinate Rotation Digital Computer (CORDIC) technique are used to design the proposed ADC ORA circuit. The ADC's static and dynamic parameters can both be obtained using the proposed circuit. The basic CORDIC based ADC ORA circuit is designed and synthesized in a 0.18-uμm technology to analyze the outputs an 8-bit ADC to verify the designs. It shows a lower area overhead compared with the Fast Fourier transform (FFT) based realization.",

author = "Ting, {Hsin Wen} and Chao, {I. Jen} and Lien, {Yu Chang} and Chang, {Soon Jyh} and Liu, {Bin Da}",

year = "2009",

month = sep,

day = "17",

doi = "10.1109/CAS-ICTD.2009.4960751",

language = "English",

isbn = "9781424425877",

series = "2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09",

booktitle = "2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09",

note = "2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09 ; Conference date: 28-04-2009 Through 29-04-2009",

}

Ting, HW, Chao, IJ, Lien, YC, Chang, SJ & Liu, BD 2009, A low-cost output response analyzer circuit for ADC BIST. in 2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09., 4960751, 2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09, 2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09, Chengdu, China, 09-04-28. https://doi.org/10.1109/CAS-ICTD.2009.4960751

A low-cost output response analyzer circuit for ADC BIST. / Ting, Hsin Wen; Chao, I. Jen; Lien, Yu Chang et al.
2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09. 2009. 4960751 (2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - A low-cost output response analyzer circuit for ADC BIST

AU - Ting, Hsin Wen

AU - Chao, I. Jen

AU - Lien, Yu Chang

AU - Chang, Soon Jyh

AU - Liu, Bin Da

PY - 2009/9/17

Y1 - 2009/9/17

N2 - In this paper, a low-cost ADC output response analyzer (ORA) circuit for built-in self-test (BIST) application is proposed. The sine-wave histogram testing method and the basic COordinate Rotation Digital Computer (CORDIC) technique are used to design the proposed ADC ORA circuit. The ADC's static and dynamic parameters can both be obtained using the proposed circuit. The basic CORDIC based ADC ORA circuit is designed and synthesized in a 0.18-uμm technology to analyze the outputs an 8-bit ADC to verify the designs. It shows a lower area overhead compared with the Fast Fourier transform (FFT) based realization.

AB - In this paper, a low-cost ADC output response analyzer (ORA) circuit for built-in self-test (BIST) application is proposed. The sine-wave histogram testing method and the basic COordinate Rotation Digital Computer (CORDIC) technique are used to design the proposed ADC ORA circuit. The ADC's static and dynamic parameters can both be obtained using the proposed circuit. The basic CORDIC based ADC ORA circuit is designed and synthesized in a 0.18-uμm technology to analyze the outputs an 8-bit ADC to verify the designs. It shows a lower area overhead compared with the Fast Fourier transform (FFT) based realization.

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DO - 10.1109/CAS-ICTD.2009.4960751

M3 - Conference contribution

AN - SCOPUS:70149098935

SN - 9781424425877

T3 - 2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09

BT - 2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09

T2 - 2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09

Y2 - 28 April 2009 through 29 April 2009

ER -

A low-cost output response analyzer circuit for ADC BIST

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