A low-cost VLSI architecture for robust distributed estimation in wireless sensor networks

Li Yuan Chang, Pei Yin Chen, Tsang Yi Wang, Ching Sung Chen

Research output: Contribution to journalArticle

7 Citations (Scopus)

Abstract

A robust distributed estimation scheme for fusion center in the presence of sensor faults via collaborative sensor fault detection (CSFD) was proposed in our previous research. The scheme can identify the faulty nodes efficiently and improve the accuracy of the estimates significantly. It achieves very good performance at the expense of such extensive computations as logarithm and division in the detecting process. In many real-time WSN applications, the fusion center might be implemented with the ASIC and included in a standalone device. Therefore, a simple and efficient distributed estimation scheme requiring lower hardware cost and power consumption is extremely desired for fusion center. In this paper, we propose the efficient collaborative sensor fault detection (ECSFD) scheme and its VLSI architecture. Given the low circuit complexity, it is suitable for hardware implementation. The circuit of ECSFD contains 22589 gates and requires a core size of 571 × 559 μm 2 by using TSMC 0.18 μm cell library. Simulation results indicate the accuracy of the estimates obtained from the ECSFD is better than that obtained from a conventional approach.

Original languageEnglish
Article number5678818
Pages (from-to)1277-1286
Number of pages10
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume58
Issue number6
DOIs
Publication statusPublished - 2011 Jan 10

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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