A Low-Cost VLSI Architecture of the Bilateral Filter for Real-Time Image Denoising

Chih Yuan Lien; Chi Huan Tang; Pei Yin Chen; Yao Tsung Kuo; Yue Ling Deng

doi:10.1109/ACCESS.2020.2984688

A Low-Cost VLSI Architecture of the Bilateral Filter for Real-Time Image Denoising

Chih Yuan Lien, Chi Huan Tang, Pei Yin Chen, Yao Tsung Kuo, Yue Ling Deng

Department of Computer Science and Information Engineering

Research output: Contribution to journal › Article › peer-review

19 Citations (Scopus)

Abstract

In this paper, a low-cost hardware architecture of the bilateral filter for real-time image processing is proposed. Based on the techniques of distance-oriented grouping and hardware resource sharing, the usage of multipliers can decrease 48% as compared to the previous approach. Besides, an efficient quantization method is applied to reduce the size of required look up tables. The experimental results show that the proposed architecture is cost efficient while maintaining the same image quality, frame rate and working clock frequency.

Original language	English
Article number	9051724
Pages (from-to)	64278-64283
Number of pages	6
Journal	IEEE Access
Volume	8
DOIs	https://doi.org/10.1109/ACCESS.2020.2984688
Publication status	Published - 2020

All Science Journal Classification (ASJC) codes

General Computer Science
General Materials Science
General Engineering

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10.1109/ACCESS.2020.2984688

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abstract = "In this paper, a low-cost hardware architecture of the bilateral filter for real-time image processing is proposed. Based on the techniques of distance-oriented grouping and hardware resource sharing, the usage of multipliers can decrease 48% as compared to the previous approach. Besides, an efficient quantization method is applied to reduce the size of required look up tables. The experimental results show that the proposed architecture is cost efficient while maintaining the same image quality, frame rate and working clock frequency.",

author = "Lien, {Chih Yuan} and Tang, {Chi Huan} and Chen, {Pei Yin} and Kuo, {Yao Tsung} and Deng, {Yue Ling}",

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AU - Kuo, Yao Tsung

AU - Deng, Yue Ling

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AB - In this paper, a low-cost hardware architecture of the bilateral filter for real-time image processing is proposed. Based on the techniques of distance-oriented grouping and hardware resource sharing, the usage of multipliers can decrease 48% as compared to the previous approach. Besides, an efficient quantization method is applied to reduce the size of required look up tables. The experimental results show that the proposed architecture is cost efficient while maintaining the same image quality, frame rate and working clock frequency.

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A Low-Cost VLSI Architecture of the Bilateral Filter for Real-Time Image Denoising

Abstract

All Science Journal Classification (ASJC) codes

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