A low dropout linear regulator with high power supply rejection

Huei Sheng Jhuang, Jia Hui Wang, Zi Yu Zeng, Chien-Hung Tsai

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

Combining the supply ripple subtraction and high-pass filtering can improve the power supply rejection (PSR) over wideband frequency of low dropout regulator (LDO). The proposed LDO is fabricated by TSMC 0.35μm 2-poly 4-metal CMOS process. The simulation results at maximum load current of 100mA, show that PSR at 10k, 100k and 1M are -72dB, -75dB and -46dB,respectively. Therefore, it's well suited for switching pre-regulator and SoC applications. The active area of this LDO is 300x360μm2.

Original languageEnglish
Title of host publicationISIC-2009 - 12th International Symposium on Integrated Circuits, Proceedings
Pages41-44
Number of pages4
Publication statusPublished - 2009
Event12th International Symposium on Integrated Circuits, ISIC-2009 - Singapore, Singapore
Duration: 2009 Dec 14 → 2009 Dec 16

Other

Other12th International Symposium on Integrated Circuits, ISIC-2009
CountrySingapore
CitySingapore
Period09-12-14 → 09-12-16

All Science Journal Classification (ASJC) codes

  • Computational Theory and Mathematics
  • Computer Graphics and Computer-Aided Design
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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