A low-dropout regulator with tail current control for DPWM clock correction

Jia Hui Wang; Chien Hung Tsai; Sheng Wen Lai

doi:10.1109/TCSII.2011.2177703

A low-dropout regulator with tail current control for DPWM clock correction

Jia Hui Wang, Chien Hung Tsai, Sheng Wen Lai

Department of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

30 Citations (Scopus)

Abstract

A low-dropout (LDO) regulator with tail current control (TCC) is presented. The TCC consists of a dual differential pair, a 5-bit current digital-to-analog converter, and a current summation circuit. The TCC adjusts the tail current ratio of the dual differential pair of the LDO regulator to achieve a programmable output voltage using 5-bit digital signals. A supply-ripple isolation mechanism is added to improve the power supply rejection over a wide frequency range. The proposed design is fabricated in the TSMC 0.18-\mu \hbox{m} 1-poly 6-metal complementary metal-oxide-semiconductor process. Experimental results show that the LDO regulator has a 32-level programmable output voltage ranging from 1 to 1.2 V, making the LDO regulator suitable for correcting the oscillator frequency of a digital pulsewidth modulator.

Original language	English
Article number	6107568
Pages (from-to)	45-49
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	59
Issue number	1
DOIs	https://doi.org/10.1109/TCSII.2011.2177703
Publication status	Published - 2012 Jan

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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10.1109/TCSII.2011.2177703

Cite this

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abstract = "A low-dropout (LDO) regulator with tail current control (TCC) is presented. The TCC consists of a dual differential pair, a 5-bit current digital-to-analog converter, and a current summation circuit. The TCC adjusts the tail current ratio of the dual differential pair of the LDO regulator to achieve a programmable output voltage using 5-bit digital signals. A supply-ripple isolation mechanism is added to improve the power supply rejection over a wide frequency range. The proposed design is fabricated in the TSMC 0.18-\mu \hbox{m} 1-poly 6-metal complementary metal-oxide-semiconductor process. Experimental results show that the LDO regulator has a 32-level programmable output voltage ranging from 1 to 1.2 V, making the LDO regulator suitable for correcting the oscillator frequency of a digital pulsewidth modulator.",

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A low-dropout regulator with tail current control for DPWM clock correction

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