A low power 20-GHz low-noise amplifier fabricated using 0.18-μm CMOS technology

J. X. Liu, H. C. Kuo, Y. K. Chu, J. F. Yeh, Huey-Ru Chuang

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

A 20-GHz CMOS low-noise amplifier (LNA) fabricated with the 0.18 μm process is presented. This two-stage cascaded common source LNA exhibits low power consumption with a satisfying performance such as overall gain and noise figure (NF). The measurement is performed on-wafer. The 20-GHz LNA has demonstrated a 9.3 dB gain, a 4.4 dB NF, a -10 dBm input P1db and a 0.65 dBm IIP3. The power consumption is 9.6 mW from a 1.2 V power supply.

Original languageEnglish
Pages (from-to)423-426
Number of pages4
JournalMicrowave and Optical Technology Letters
Volume51
Issue number2
DOIs
Publication statusPublished - 2009 Feb 1

Fingerprint

Low noise amplifiers
low noise
CMOS
amplifiers
Noise figure
Electric power utilization
power supplies
wafers

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Cite this

Liu, J. X. ; Kuo, H. C. ; Chu, Y. K. ; Yeh, J. F. ; Chuang, Huey-Ru. / A low power 20-GHz low-noise amplifier fabricated using 0.18-μm CMOS technology. In: Microwave and Optical Technology Letters. 2009 ; Vol. 51, No. 2. pp. 423-426.
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A low power 20-GHz low-noise amplifier fabricated using 0.18-μm CMOS technology. / Liu, J. X.; Kuo, H. C.; Chu, Y. K.; Yeh, J. F.; Chuang, Huey-Ru.

In: Microwave and Optical Technology Letters, Vol. 51, No. 2, 01.02.2009, p. 423-426.

Research output: Contribution to journalArticle

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