A low-power design methodology for sigma-delta modulators with relaxation of required circuit specifications

Jia Hua Hong; Ming Chun Liang; Jing Yi Wong; Shuenn Yuh Lee

doi:10.1109/VLDI-DAT.2013.6533872

A low-power design methodology for sigma-delta modulators with relaxation of required circuit specifications

Jia Hua Hong, Ming Chun Liang, Jing Yi Wong, Shuenn Yuh Lee

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

A design methodology of high-order sigma-delta modulators (SDMs) with relaxation of required circuit specifications is proposed to reduce the required power consumption and to be suitable for the nano-scale circuit. According to the proposed design flow, more relaxed circuit specifications can be selected so that designers can maintain system performance. One design example is employed to verify the proposed design flow. Circuit-level simulation reveals that the power consumption is lower under the same system performance compared with a conventional design flow. The circuits are implement with TSMC 90nm 1P9M CMOS process and the measured signal-to-noise distortion ratio (SNDR) is 64.5 dB, with a power consumption of 303μW.

Original language	English
Title of host publication	2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
DOIs	https://doi.org/10.1109/VLDI-DAT.2013.6533872
Publication status	Published - 2013 Aug 15
Event	2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013 - Hsinchu, Taiwan Duration: 2013 Apr 22 → 2013 Apr 24

Publication series

Name	2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013

Other

Other	2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
Country	Taiwan
City	Hsinchu
Period	13-04-22 → 13-04-24

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/VLDI-DAT.2013.6533872

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Hong, J. H., Liang, M. C., Wong, J. Y., & Lee, S. Y. (2013). A low-power design methodology for sigma-delta modulators with relaxation of required circuit specifications. In 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013 [6533872] (2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013). https://doi.org/10.1109/VLDI-DAT.2013.6533872

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title = "A low-power design methodology for sigma-delta modulators with relaxation of required circuit specifications",

abstract = "A design methodology of high-order sigma-delta modulators (SDMs) with relaxation of required circuit specifications is proposed to reduce the required power consumption and to be suitable for the nano-scale circuit. According to the proposed design flow, more relaxed circuit specifications can be selected so that designers can maintain system performance. One design example is employed to verify the proposed design flow. Circuit-level simulation reveals that the power consumption is lower under the same system performance compared with a conventional design flow. The circuits are implement with TSMC 90nm 1P9M CMOS process and the measured signal-to-noise distortion ratio (SNDR) is 64.5 dB, with a power consumption of 303μW.",

author = "Hong, {Jia Hua} and Liang, {Ming Chun} and Wong, {Jing Yi} and Lee, {Shuenn Yuh}",

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series = "2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013",

booktitle = "2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013",

note = "2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013 ; Conference date: 22-04-2013 Through 24-04-2013",

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Hong, JH, Liang, MC, Wong, JY & Lee, SY 2013, A low-power design methodology for sigma-delta modulators with relaxation of required circuit specifications. in 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013., 6533872, 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013, 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013, Hsinchu, Taiwan, 13-04-22. https://doi.org/10.1109/VLDI-DAT.2013.6533872

A low-power design methodology for sigma-delta modulators with relaxation of required circuit specifications. / Hong, Jia Hua; Liang, Ming Chun; Wong, Jing Yi; Lee, Shuenn Yuh.

2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013. 2013. 6533872 (2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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Hong JH, Liang MC, Wong JY, Lee SY. A low-power design methodology for sigma-delta modulators with relaxation of required circuit specifications. In 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013. 2013. 6533872. (2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013). https://doi.org/10.1109/VLDI-DAT.2013.6533872