TY - GEN
T1 - A low power duobinary voltage mode transmitter
AU - Chien, Ming Hung
AU - Lee, Yen Long
AU - Goh, Jih Ren
AU - Chang, Soon Jyh
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/8/11
Y1 - 2017/8/11
N2 - This paper presents a novel low power duobinary voltage mode transmitter in 90-nm CMOS process for wireline communication. As a matter of fact, voltage mode transmitters potentially save much more power than current mode transmitters. By adding a medium level, a half supply voltage, to conventional NRZ voltage mode transmitters, duobinary coding can simply be achieved. Post-layout simulation demonstrates the architecture with a new preemphasis method dissipates approximately 16.35 mW from a 1.0 V supply when transmitting 8 Gb/s 1.0 V differential amplitude data with 2-tap pre-emphasis, achieving 2.04 pJ/bit energy efficiency.
AB - This paper presents a novel low power duobinary voltage mode transmitter in 90-nm CMOS process for wireline communication. As a matter of fact, voltage mode transmitters potentially save much more power than current mode transmitters. By adding a medium level, a half supply voltage, to conventional NRZ voltage mode transmitters, duobinary coding can simply be achieved. Post-layout simulation demonstrates the architecture with a new preemphasis method dissipates approximately 16.35 mW from a 1.0 V supply when transmitting 8 Gb/s 1.0 V differential amplitude data with 2-tap pre-emphasis, achieving 2.04 pJ/bit energy efficiency.
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U2 - 10.1109/ISLPED.2017.8009205
DO - 10.1109/ISLPED.2017.8009205
M3 - Conference contribution
AN - SCOPUS:85028608298
T3 - Proceedings of the International Symposium on Low Power Electronics and Design
BT - ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 22nd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017
Y2 - 24 July 2017 through 26 July 2017
ER -