A low power duobinary voltage mode transmitter

Ming Hung Chien, Yen Long Lee, Jih Ren Goh, Soon Jyh Chang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper presents a novel low power duobinary voltage mode transmitter in 90-nm CMOS process for wireline communication. As a matter of fact, voltage mode transmitters potentially save much more power than current mode transmitters. By adding a medium level, a half supply voltage, to conventional NRZ voltage mode transmitters, duobinary coding can simply be achieved. Post-layout simulation demonstrates the architecture with a new preemphasis method dissipates approximately 16.35 mW from a 1.0 V supply when transmitting 8 Gb/s 1.0 V differential amplitude data with 2-tap pre-emphasis, achieving 2.04 pJ/bit energy efficiency.

Original languageEnglish
Title of host publicationISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509060238
DOIs
Publication statusPublished - 2017 Aug 11
Event22nd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017 - Taipei, Taiwan
Duration: 2017 Jul 242017 Jul 26

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
ISSN (Print)1533-4678

Other

Other22nd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017
CountryTaiwan
CityTaipei
Period17-07-2417-07-26

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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