Abstract
An area-efficient pulsewidth modulation (PWM)-residual-aliasing reduction technique is proposed for Class-D audio amplifiers by utilizing a low-complexity feed-forward path to cancel the PWM high-frequency components inside the feedback loop. The proposed technique reduces the PWM-residual-aliasing distortion without increasing the required switching frequency or power-hungry controller circuits, thereby lowering both the quiescent current and total harmonic distortion plus noise (THD+N) in Class-D audio amplifiers. Measurement results show that the proposed technique improves the THD+N of second-order Class-D amplifiers by 16.2 dB with a 1-kHz input; in addition, the Class-D amplifier of this paper achieves a minimum THD+N of 0.0032% while operating at a 215-kHz switching frequency, resulting in a reduction in quiescent current of more than 33%. Compared with other state of the arts, this paper implemented in 0.5-μm CMOS technology features a competitive THD+N while consuming the lowest quiescent current of 0.96 mA and occupying the smallest active area of 0.49 mm².
| Original language | English |
|---|---|
| Journal | IEEE Journal of Solid-State Circuits |
| DOIs | |
| Publication status | Accepted/In press - 2018 Jan 1 |
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All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
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A Low Quiescent Current, Low THD+N Class-D Audio Amplifier With Area-Efficient PWM-Residual-Aliasing Reduction. / Chien, Shih Hsiung; Chen, Yi Wen; Kuo, Tai-Haur.
In: IEEE Journal of Solid-State Circuits, 01.01.2018.Research output: Contribution to journal › Article
TY - JOUR
T1 - A Low Quiescent Current, Low THD+N Class-D Audio Amplifier With Area-Efficient PWM-Residual-Aliasing Reduction
AU - Chien, Shih Hsiung
AU - Chen, Yi Wen
AU - Kuo, Tai-Haur
PY - 2018/1/1
Y1 - 2018/1/1
N2 - An area-efficient pulsewidth modulation (PWM)-residual-aliasing reduction technique is proposed for Class-D audio amplifiers by utilizing a low-complexity feed-forward path to cancel the PWM high-frequency components inside the feedback loop. The proposed technique reduces the PWM-residual-aliasing distortion without increasing the required switching frequency or power-hungry controller circuits, thereby lowering both the quiescent current and total harmonic distortion plus noise (THD+N) in Class-D audio amplifiers. Measurement results show that the proposed technique improves the THD+N of second-order Class-D amplifiers by 16.2 dB with a 1-kHz input; in addition, the Class-D amplifier of this paper achieves a minimum THD+N of 0.0032% while operating at a 215-kHz switching frequency, resulting in a reduction in quiescent current of more than 33%. Compared with other state of the arts, this paper implemented in 0.5-μm CMOS technology features a competitive THD+N while consuming the lowest quiescent current of 0.96 mA and occupying the smallest active area of 0.49 mm².
AB - An area-efficient pulsewidth modulation (PWM)-residual-aliasing reduction technique is proposed for Class-D audio amplifiers by utilizing a low-complexity feed-forward path to cancel the PWM high-frequency components inside the feedback loop. The proposed technique reduces the PWM-residual-aliasing distortion without increasing the required switching frequency or power-hungry controller circuits, thereby lowering both the quiescent current and total harmonic distortion plus noise (THD+N) in Class-D audio amplifiers. Measurement results show that the proposed technique improves the THD+N of second-order Class-D amplifiers by 16.2 dB with a 1-kHz input; in addition, the Class-D amplifier of this paper achieves a minimum THD+N of 0.0032% while operating at a 215-kHz switching frequency, resulting in a reduction in quiescent current of more than 33%. Compared with other state of the arts, this paper implemented in 0.5-μm CMOS technology features a competitive THD+N while consuming the lowest quiescent current of 0.96 mA and occupying the smallest active area of 0.49 mm².
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UR - http://www.scopus.com/inward/citedby.url?scp=85055725902&partnerID=8YFLogxK
U2 - 10.1109/JSSC.2018.2873613
DO - 10.1109/JSSC.2018.2873613
M3 - Article
AN - SCOPUS:85055725902
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
SN - 0018-9200
ER -