@inproceedings{868587362709464d9d43d390139392c6,
title = "A low store energy and robust ReRAM-based flip-flop for normally off microprocessors",
abstract = "Normally-off computing (NoC) is one of promising techniques that benefits microsystems with long sleep time. Because NoC can turn off power to achieve zero power consumption and can activate microsystems instantly. This study proposes a novel resistive random access memory (ReRAM)-based nonvolatile flip-flop (NVFF), fabricated using 90-nm CMOS technology and the ReRAM process of the Industrial Technology Research Institute. The proposed NVFF uses a complementary structure with one-phase store to mitigate limitation on store energy and was verified as the registers in three pipeline stages of a NV multiplier-and-accumulator macro. The proposed ReRAM-based NVFF, compared with the state-of-the-art complementary design, can reduce store energy by 36.4%, restore time by 64.2%, and circuit area by 42.8%. The proposed design was also superior in reducing restoration error (by 9.44%) under hardship condition compared to NVFFs with a single NV device.",
author = "Chien, {Tsai Kan} and Chiou, {Lih Yih} and Chuang, {Yao Chun} and Sheu, {Shyh Shyuan} and Li, {Heng Yuan} and Wang, {Pei Hua} and Ku, {Tzu Kun} and Tsai, {Ming Jinn} and Wu, {Chih I.}",
year = "2016",
month = jul,
day = "29",
doi = "10.1109/ISCAS.2016.7539175",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "2803--2806",
booktitle = "ISCAS 2016 - IEEE International Symposium on Circuits and Systems",
address = "United States",
note = "2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 ; Conference date: 22-05-2016 Through 25-05-2016",
}