A low supply noise content-sensitive ROM architecture for SoC

Meng Fan Chang, Lih-Yih Chiou, Kuei Ann Wen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

Supply noise caused by fluctuation of peak current is increasingly important for SoC. This work proposes a content-sensitive architecture to effectively reduce the fluctuation of peak current and lower power consumption of ROMs for various code-patterns and cycles. We achieve both by arranging the data patterns of ROM and by adjusting the bitline structures accordingly. Our experiments on 0.25μm 256K bits ROM macros have shown that the fluctuation of peak current and power consumptions are less than 1.02% of the value using conventional approaches.

Original languageEnglish
Title of host publicationProceedings of the 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004
Subtitle of host publicationSoC Design for Ubiquitous Information Technology
Pages1021-1024
Number of pages4
Volume2
Publication statusPublished - 2004
Event2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology - Tainan, Taiwan
Duration: 2004 Dec 62004 Dec 9

Other

Other2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology
CountryTaiwan
CityTainan
Period04-12-0604-12-09

Fingerprint

ROM
Electric power utilization
Macros
System-on-chip
Experiments

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Chang, M. F., Chiou, L-Y., & Wen, K. A. (2004). A low supply noise content-sensitive ROM architecture for SoC. In Proceedings of the 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology (Vol. 2, pp. 1021-1024)
Chang, Meng Fan ; Chiou, Lih-Yih ; Wen, Kuei Ann. / A low supply noise content-sensitive ROM architecture for SoC. Proceedings of the 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology. Vol. 2 2004. pp. 1021-1024
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abstract = "Supply noise caused by fluctuation of peak current is increasingly important for SoC. This work proposes a content-sensitive architecture to effectively reduce the fluctuation of peak current and lower power consumption of ROMs for various code-patterns and cycles. We achieve both by arranging the data patterns of ROM and by adjusting the bitline structures accordingly. Our experiments on 0.25μm 256K bits ROM macros have shown that the fluctuation of peak current and power consumptions are less than 1.02{\%} of the value using conventional approaches.",
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Chang, MF, Chiou, L-Y & Wen, KA 2004, A low supply noise content-sensitive ROM architecture for SoC. in Proceedings of the 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology. vol. 2, pp. 1021-1024, 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology, Tainan, Taiwan, 04-12-06.

A low supply noise content-sensitive ROM architecture for SoC. / Chang, Meng Fan; Chiou, Lih-Yih; Wen, Kuei Ann.

Proceedings of the 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology. Vol. 2 2004. p. 1021-1024.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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AB - Supply noise caused by fluctuation of peak current is increasingly important for SoC. This work proposes a content-sensitive architecture to effectively reduce the fluctuation of peak current and lower power consumption of ROMs for various code-patterns and cycles. We achieve both by arranging the data patterns of ROM and by adjusting the bitline structures accordingly. Our experiments on 0.25μm 256K bits ROM macros have shown that the fluctuation of peak current and power consumptions are less than 1.02% of the value using conventional approaches.

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Chang MF, Chiou L-Y, Wen KA. A low supply noise content-sensitive ROM architecture for SoC. In Proceedings of the 2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology. Vol. 2. 2004. p. 1021-1024