A memory built-in self-diagnosis design with syndrome compression

Rei Fu Huang; Chin Lung Su; Cheng Wen Wu; Yeong Jar Chang; Wen Ching Wu

A memory built-in self-diagnosis design with syndrome compression

Rei Fu Huang, Chin Lung Su, Cheng Wen Wu, Yeong Jar Chang, Wen Ching Wu

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

7 Citations (Scopus)

Abstract

We present a memory built-in self-diagnosis (BISD) design that incorporates a fault syndrome compression scheme. We also have developed efficient faulty-word, faulty-row, and faulty-column identification methods, which have been incorporated in our new BISD design. Our approach reduces the amount of data that need to be transmitted from the chip under test to the automatic test equipment (ATE). It therefore reduces the ATE occupation time and the required ATE capture memory space. It also simplifies the analysis that has to be performed on the ATE. Simulation results for memories under various fault pattern distributions show that in most cases the data can be compressed to less than 6% of its original size.

Original language	English
Title of host publication	Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004
Editors	S. Menon, J. Plusquellic, A. Singh, H. Manhaeve
Pages	99-104
Number of pages	6
Publication status	Published - 2004 Dec 1
Event	2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004 - Napa Valley, CA, United States Duration: 2004 Apr 25 → 2004 Apr 25

Publication series

Name	Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004

Conference

Conference	2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004
Country/Territory	United States
City	Napa Valley, CA
Period	04-04-25 → 04-04-25

All Science Journal Classification (ASJC) codes

General Engineering

Cite this

Huang, R. F., Su, C. L., Wu, C. W., Chang, Y. J., & Wu, W. C. (2004). A memory built-in self-diagnosis design with syndrome compression. In S. Menon, J. Plusquellic, A. Singh, & H. Manhaeve (Eds.), Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004 (pp. 99-104). (Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004).

Huang, Rei Fu ; Su, Chin Lung ; Wu, Cheng Wen et al. / A memory built-in self-diagnosis design with syndrome compression. Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004. editor / S. Menon ; J. Plusquellic ; A. Singh ; H. Manhaeve. 2004. pp. 99-104 (Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004).

@inproceedings{ec5b2b6148a445d7a41d98bb4ce8b902,

title = "A memory built-in self-diagnosis design with syndrome compression",

abstract = "We present a memory built-in self-diagnosis (BISD) design that incorporates a fault syndrome compression scheme. We also have developed efficient faulty-word, faulty-row, and faulty-column identification methods, which have been incorporated in our new BISD design. Our approach reduces the amount of data that need to be transmitted from the chip under test to the automatic test equipment (ATE). It therefore reduces the ATE occupation time and the required ATE capture memory space. It also simplifies the analysis that has to be performed on the ATE. Simulation results for memories under various fault pattern distributions show that in most cases the data can be compressed to less than 6% of its original size.",

author = "Huang, {Rei Fu} and Su, {Chin Lung} and Wu, {Cheng Wen} and Chang, {Yeong Jar} and Wu, {Wen Ching}",

year = "2004",

month = dec,

day = "1",

language = "English",

isbn = "0780389506",

series = "Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004",

pages = "99--104",

editor = "S. Menon and J. Plusquellic and A. Singh and H. Manhaeve",

booktitle = "Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004",

note = "2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004 ; Conference date: 25-04-2004 Through 25-04-2004",

}

Huang, RF, Su, CL, Wu, CW, Chang, YJ & Wu, WC 2004, A memory built-in self-diagnosis design with syndrome compression. in S Menon, J Plusquellic, A Singh & H Manhaeve (eds), Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004. Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004, pp. 99-104, 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004, Napa Valley, CA, United States, 04-04-25.

A memory built-in self-diagnosis design with syndrome compression. / Huang, Rei Fu; Su, Chin Lung; Wu, Cheng Wen et al.
Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004. ed. / S. Menon; J. Plusquellic; A. Singh; H. Manhaeve. 2004. p. 99-104 (Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AU - Huang, Rei Fu

AU - Su, Chin Lung

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N2 - We present a memory built-in self-diagnosis (BISD) design that incorporates a fault syndrome compression scheme. We also have developed efficient faulty-word, faulty-row, and faulty-column identification methods, which have been incorporated in our new BISD design. Our approach reduces the amount of data that need to be transmitted from the chip under test to the automatic test equipment (ATE). It therefore reduces the ATE occupation time and the required ATE capture memory space. It also simplifies the analysis that has to be performed on the ATE. Simulation results for memories under various fault pattern distributions show that in most cases the data can be compressed to less than 6% of its original size.

AB - We present a memory built-in self-diagnosis (BISD) design that incorporates a fault syndrome compression scheme. We also have developed efficient faulty-word, faulty-row, and faulty-column identification methods, which have been incorporated in our new BISD design. Our approach reduces the amount of data that need to be transmitted from the chip under test to the automatic test equipment (ATE). It therefore reduces the ATE occupation time and the required ATE capture memory space. It also simplifies the analysis that has to be performed on the ATE. Simulation results for memories under various fault pattern distributions show that in most cases the data can be compressed to less than 6% of its original size.

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Huang RF, Su CL, Wu CW, Chang YJ, Wu WC. A memory built-in self-diagnosis design with syndrome compression. In Menon S, Plusquellic J, Singh A, Manhaeve H, editors, Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004. 2004. p. 99-104. (Proceedings - 2004 IEEE International Workshop on Current and Defect Based Testing, DBT 2004).

A memory built-in self-diagnosis design with syndrome compression

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