A memory-efficient NoC system for OpenCL many-core platform

Chien Hsuan Yen, Chung-Ho Chen, Kuan Chung Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

We present a memory-efficient NoC system for OpenCL many-core platforms. By offloading the OpenCL kernel programs into the many-core processor, we reveal that the memory contention overheads have dramatically increased with the scaling of the system, resulting to the poor performance scalability of the many-core system. We explore a memory-efficient NoC system design which includes a mesh network, a hybrid network interface for packet composition and decomposition, and a memory controller with access scheduling capability. Our experimental results show that a simple memory access scheduling and caching approach can easily boost the performance of the NoC and memory system up to 20 percent by eliminating the memory controller contention problem.

Original languageEnglish
Title of host publication2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1386-1389
Number of pages4
Volume2015-July
ISBN (Electronic)9781479983919
DOIs
Publication statusPublished - 2015 Jul 27
EventIEEE International Symposium on Circuits and Systems, ISCAS 2015 - Lisbon, Portugal
Duration: 2015 May 242015 May 27

Other

OtherIEEE International Symposium on Circuits and Systems, ISCAS 2015
CountryPortugal
CityLisbon
Period15-05-2415-05-27

Fingerprint

Computer systems
Data storage equipment
Scheduling
Controllers
Network-on-chip
Interfaces (computer)
Scalability
Systems analysis
Decomposition
Chemical analysis

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Yen, C. H., Chen, C-H., & Chen, K. C. (2015). A memory-efficient NoC system for OpenCL many-core platform. In 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015 (Vol. 2015-July, pp. 1386-1389). [7168901] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2015.7168901
Yen, Chien Hsuan ; Chen, Chung-Ho ; Chen, Kuan Chung. / A memory-efficient NoC system for OpenCL many-core platform. 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015. Vol. 2015-July Institute of Electrical and Electronics Engineers Inc., 2015. pp. 1386-1389
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Yen, CH, Chen, C-H & Chen, KC 2015, A memory-efficient NoC system for OpenCL many-core platform. in 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015. vol. 2015-July, 7168901, Institute of Electrical and Electronics Engineers Inc., pp. 1386-1389, IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, 15-05-24. https://doi.org/10.1109/ISCAS.2015.7168901

A memory-efficient NoC system for OpenCL many-core platform. / Yen, Chien Hsuan; Chen, Chung-Ho; Chen, Kuan Chung.

2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015. Vol. 2015-July Institute of Electrical and Electronics Engineers Inc., 2015. p. 1386-1389 7168901.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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N2 - We present a memory-efficient NoC system for OpenCL many-core platforms. By offloading the OpenCL kernel programs into the many-core processor, we reveal that the memory contention overheads have dramatically increased with the scaling of the system, resulting to the poor performance scalability of the many-core system. We explore a memory-efficient NoC system design which includes a mesh network, a hybrid network interface for packet composition and decomposition, and a memory controller with access scheduling capability. Our experimental results show that a simple memory access scheduling and caching approach can easily boost the performance of the NoC and memory system up to 20 percent by eliminating the memory controller contention problem.

AB - We present a memory-efficient NoC system for OpenCL many-core platforms. By offloading the OpenCL kernel programs into the many-core processor, we reveal that the memory contention overheads have dramatically increased with the scaling of the system, resulting to the poor performance scalability of the many-core system. We explore a memory-efficient NoC system design which includes a mesh network, a hybrid network interface for packet composition and decomposition, and a memory controller with access scheduling capability. Our experimental results show that a simple memory access scheduling and caching approach can easily boost the performance of the NoC and memory system up to 20 percent by eliminating the memory controller contention problem.

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Yen CH, Chen C-H, Chen KC. A memory-efficient NoC system for OpenCL many-core platform. In 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015. Vol. 2015-July. Institute of Electrical and Electronics Engineers Inc. 2015. p. 1386-1389. 7168901 https://doi.org/10.1109/ISCAS.2015.7168901