A model for underfill viscous flow considering the resistance induced by solder bumps

Chyi Lang Lai, Wen-Bin Young

Research output: Contribution to journalArticle

10 Citations (Scopus)

Abstract

During the underfill process, polymers driven by either capillary force or external pressure are filled at a low speed between the chip and substrate. Current methods treated the flow in the chip cavity as a laminar flow between parallel plates, which ignored the resistance induced by the solder bumps or other obstructions. In this study, the filling flow between solder bumps was simulated by a flow through a porous media. By using the superposition of flows through parallel plates and series of rectangular ducts, permeability of the underfill flow was fully characterized by the geometric arrangement of solder bumps and flat chips. The flow resistances caused by adjacent bumps were represented in its permeability. The model proposed in this study could provide a numerical approach to approximate and simulate the undefill process for flip-chip technology. Although the proposed model is applicable for any geometric arrangement of solder bumps, rectangulararray of solder bumps layout was used first for comparison with experimental results of other article. Comparisons of the flow-front shapes and filling time with the experimental data indicated that the flow simulation obtained from the proposed model gave a good prediction for the underfill flow.

Original languageEnglish
Pages (from-to)186-194
Number of pages9
JournalJournal of Electronic Packaging, Transactions of the ASME
Volume126
Issue number2
DOIs
Publication statusPublished - 2004 Jun 1

Fingerprint

Viscous flow
Soldering alloys
Flow simulation
Laminar flow
Ducts
Porous materials
Polymers
Substrates

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Mechanics of Materials
  • Computer Science Applications
  • Electrical and Electronic Engineering

Cite this

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A model for underfill viscous flow considering the resistance induced by solder bumps. / Lai, Chyi Lang; Young, Wen-Bin.

In: Journal of Electronic Packaging, Transactions of the ASME, Vol. 126, No. 2, 01.06.2004, p. 186-194.

Research output: Contribution to journalArticle

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