A Multi-Stage Fault-Tolerant Multiplier with Triple Module Redundancy (TMR) Technique

Ping-Yeh Yin, Yuan Ho Chen, Chih Wen Lu, Shian Shing Shyu, Chung Lin Lee, Ting-Chia Ou, Yo Sheng Lin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Citations (Scopus)
Original languageEnglish
Title of host publicationproc. 4th International Conference on Intelligent Systems Modelling & Simulation (ISMS)
Place of PublicationBangkok, Thailand
Publication statusPublished - 2013 Jan

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