A new LFSR reseeding scheme via internal response feedback

Wei Cheng Lien, Kuen-Jong Lee, Tong Yu Hsieh, Krishnendu Chakrabarty

Research output: Contribution to journalConference articlepeer-review

3 Citations (Scopus)

Abstract

Reseeding techniques have been adopted in BIST to enhance fault detectability and shorten test application time for integrated circuits. In order to achieve complete fault coverage, previous reseeding methods often need large storage space to store all required seeds. In this paper, we propose a new LFSR reseeding technique that employs the internal net responses of the circuit itself as the control signals to change the states of the LFSR. A novel test architecture containing a net selection logic module and an LFSR with some inversion logic is presented that can generate all required seeds on-chip in real time without any external or internal storage requirement. Experimental results on ISCAS benchmark circuits show that the presented technique can achieve 100% stuck-at fault coverage in a short test time by using only 0.23-2.36% of internal nets for reseeding control.

Original languageEnglish
Article number6690622
Pages (from-to)97-102
Number of pages6
JournalProceedings of the Asian Test Symposium
DOIs
Publication statusPublished - 2013 Jan 1
Event2013 22nd Asian Test Symposium, ATS 2013 - Yilan, Taiwan
Duration: 2013 Nov 182013 Nov 21

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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