A new mismatch-dependent low power technique with shadow match-line voltage-detecting scheme for CAMs

Jianwei Zhang, Yizheng Ye, Binda Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

A new mismatch-dependent low-power technique is presented for content-addressable memories (CAMs). With a novel shadow match-line voltage-detecting scheme, the word circuits realize fast self-disable of the charging paths in case of mismatches. Since the majority of CAMs words are mismatched, a significant power is reduced with a high search speed. Simulation results show the proposed 256-word × 144-bit ternary CAM, using 0.13-μm 1.2-V CMOS process, achieves 0.51 fJ/bitsearch for the word circuit with less than 900 ps search time. The achievement illustrates a 77% energy-delay-product (EDP) reduction as compared to the speedoptimized current-saving scheme.

Original languageEnglish
Title of host publicationISLPED'06 - Proceedings of the 2006 International Symposium on Low Power Electronics and Design
Pages135-138
Number of pages4
DOIs
Publication statusPublished - 2006
EventISLPED'06 - 11th ACM/IEEE International Symposium on Low Power Electronics and Design - Tegernsee, Bavaria, Germany
Duration: 2006 Oct 42006 Oct 6

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
Volume2006
ISSN (Print)1533-4678

Other

OtherISLPED'06 - 11th ACM/IEEE International Symposium on Low Power Electronics and Design
Country/TerritoryGermany
CityTegernsee, Bavaria
Period06-10-0406-10-06

All Science Journal Classification (ASJC) codes

  • General Engineering

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