A new montgomery modular multiplication algorithm and its VLSI design for RSA cryptosystem

Jun Hong Chen, Haw Shiuan Wu, Ming Der Shieh, Wen Ching Lin

Research output: Contribution to journalConference article

9 Citations (Scopus)

Abstract

Modular exponentiation for RSA cryptosystem is usually accomplished by repeated modular multiplications on large integers, which is considerably time-consuming. To speed up the operation, the Montgomery modular multiplication algorithm is employed to eliminate the trial division, and the carry-save addition is used to alleviate the carry propagation delay. In this paper, we propose a unified Montgomery modular multiplication algorithm that can be applied to fulfill either the conventional modular multiplication or squaring operation in carry-save form so as to achieve area-efficient design of modular exponentiation. Meanwhile, we reduce the number of input operands for carry-save addition by mathematical manipulation to minimize the resulting critical path delay. Compared with the existing works, our modular exponentiation design obtains the least hardware complexity and outperforms them in terms of area-time (AT) complexity.

Original languageEnglish
Article number4253504
Pages (from-to)3780-3783
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
DOIs
Publication statusPublished - 2007 Jan 1
Event2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA, United States
Duration: 2007 May 272007 May 30

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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