A novel comparison-free 1-D median filter

Ing Chao Lin; Wei Ting Chen; Yu Cheng Chou; Pei Yin Chen

doi:10.1109/TCSII.2019.2936230

A novel comparison-free 1-D median filter

Ing Chao Lin, Wei Ting Chen, Yu Cheng Chou, Pei Yin Chen

Department of Computer Science and Information Engineering

Research output: Contribution to journal › Article › peer-review

13 Citations (Scopus)

Abstract

This brief presents a novel high-speed low-cost comparison-free, 1D bit-level median filter. The filter can be customized by cascading different median units. The most prominent point is that a pre-set value is used during the process, and the partial median can be easily identified by observing the MSB. Therefore, the median can be obtained without any comparators. With this feature, the area cost drops significantly while the operating speed remains the same. The results show that when synthesized using TSMC 90nm CMOS process technology, our design can achieve 2000MHz, and the area cost is reduced by 15.72% as compared to a state-of-the-art design.

Original language	English
Article number	8807317
Pages (from-to)	1329-1333
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	67
Issue number	7
DOIs	https://doi.org/10.1109/TCSII.2019.2936230
Publication status	Published - 2020 Jul

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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10.1109/TCSII.2019.2936230

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title = "A novel comparison-free 1-D median filter",

abstract = "This brief presents a novel high-speed low-cost comparison-free, 1D bit-level median filter. The filter can be customized by cascading different median units. The most prominent point is that a pre-set value is used during the process, and the partial median can be easily identified by observing the MSB. Therefore, the median can be obtained without any comparators. With this feature, the area cost drops significantly while the operating speed remains the same. The results show that when synthesized using TSMC 90nm CMOS process technology, our design can achieve 2000MHz, and the area cost is reduced by 15.72% as compared to a state-of-the-art design.",

author = "Lin, {Ing Chao} and Chen, {Wei Ting} and Chou, {Yu Cheng} and Chen, {Pei Yin}",

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AU - Chen, Wei Ting

AU - Chou, Yu Cheng

AU - Chen, Pei Yin

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AB - This brief presents a novel high-speed low-cost comparison-free, 1D bit-level median filter. The filter can be customized by cascading different median units. The most prominent point is that a pre-set value is used during the process, and the partial median can be easily identified by observing the MSB. Therefore, the median can be obtained without any comparators. With this feature, the area cost drops significantly while the operating speed remains the same. The results show that when synthesized using TSMC 90nm CMOS process technology, our design can achieve 2000MHz, and the area cost is reduced by 15.72% as compared to a state-of-the-art design.

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A novel comparison-free 1-D median filter

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