A Novel High Speed, Three Element Si-Based Static Random Access Memory (SRAM) Cell

T. K. Carns; X. Zheng; K. L. Wang

doi:10.1109/55.790727

A Novel High Speed, Three Element Si-Based Static Random Access Memory (SRAM) Cell

T. K. Carns, X. Zheng, K. L. Wang

College of Electrical Engineering and Computer Science

Research output: Contribution to journal › Article › peer-review

5 Citations (Scopus)

Abstract

A novel three element SRAM cell consisting of a gate, a load, and a bistable SiGe/Si diode as the storage element is proposed and demonstrated with a test structure. Containing two closely-spaced delta-doped layers and a SiGe/Si strained superlattice, the diode exhibits two stable states with a conductance contrast of over six orders of magnitude, which of fers the possibility for the new cell to operate with a low power dissipation. Because the size of the diode can be as small as the design rules allow, the cell area will be comparable with that of the conventional DRAM cell. The high speed operation mechanism of the diode also provides a potential application for high speed SRAM using this cell.

Original language	English
Pages (from-to)	256-258
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	16
Issue number	6
DOIs	https://doi.org/10.1109/55.790727
Publication status	Published - 1995 Jun

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/55.790727

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title = "A Novel High Speed, Three Element Si-Based Static Random Access Memory (SRAM) Cell",

abstract = "A novel three element SRAM cell consisting of a gate, a load, and a bistable SiGe/Si diode as the storage element is proposed and demonstrated with a test structure. Containing two closely-spaced delta-doped layers and a SiGe/Si strained superlattice, the diode exhibits two stable states with a conductance contrast of over six orders of magnitude, which of fers the possibility for the new cell to operate with a low power dissipation. Because the size of the diode can be as small as the design rules allow, the cell area will be comparable with that of the conventional DRAM cell. The high speed operation mechanism of the diode also provides a potential application for high speed SRAM using this cell.",

author = "Carns, {T. K.} and X. Zheng and Wang, {K. L.}",

note = "Funding Information: Manuscript received November 2, 1994; revised January 26, 1995. This work is supported in part by the Semiconductor Research Corporation under the direction of W. Holton and W. Lynch. T. K Carns is with Zilog, Inc., Nampa, ID 83687 USA. X. Zheng and K.L. Wang are with Device Research Laboratory, Depertment of Electrical Engineering, University of California-Los Angeles, Los Angeles, CA 90024-1594 USA. IEEE Log Number 9411772.",

year = "1995",

month = jun,

doi = "10.1109/55.790727",

language = "English",

volume = "16",

pages = "256--258",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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AU - Carns, T. K.

AU - Zheng, X.

AU - Wang, K. L.

N1 - Funding Information: Manuscript received November 2, 1994; revised January 26, 1995. This work is supported in part by the Semiconductor Research Corporation under the direction of W. Holton and W. Lynch. T. K Carns is with Zilog, Inc., Nampa, ID 83687 USA. X. Zheng and K.L. Wang are with Device Research Laboratory, Depertment of Electrical Engineering, University of California-Los Angeles, Los Angeles, CA 90024-1594 USA. IEEE Log Number 9411772.

PY - 1995/6

Y1 - 1995/6

N2 - A novel three element SRAM cell consisting of a gate, a load, and a bistable SiGe/Si diode as the storage element is proposed and demonstrated with a test structure. Containing two closely-spaced delta-doped layers and a SiGe/Si strained superlattice, the diode exhibits two stable states with a conductance contrast of over six orders of magnitude, which of fers the possibility for the new cell to operate with a low power dissipation. Because the size of the diode can be as small as the design rules allow, the cell area will be comparable with that of the conventional DRAM cell. The high speed operation mechanism of the diode also provides a potential application for high speed SRAM using this cell.

AB - A novel three element SRAM cell consisting of a gate, a load, and a bistable SiGe/Si diode as the storage element is proposed and demonstrated with a test structure. Containing two closely-spaced delta-doped layers and a SiGe/Si strained superlattice, the diode exhibits two stable states with a conductance contrast of over six orders of magnitude, which of fers the possibility for the new cell to operate with a low power dissipation. Because the size of the diode can be as small as the design rules allow, the cell area will be comparable with that of the conventional DRAM cell. The high speed operation mechanism of the diode also provides a potential application for high speed SRAM using this cell.

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A Novel High Speed, Three Element Si-Based Static Random Access Memory (SRAM) Cell

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