A novel reconfigurable computation unit for DSP applications

Jer-Min Jou, Yun Lung Lee, Chen Yen Lin, Chien Ming Sun

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

In this paper, we propose a novel reconfigurable computation unit (RCU) that is higher flexible and more compact than the traditional arithmetic units. The RCU can support 22 kinds of functions. It has the ability to handle 8-bit, 16-bit and 32-bit arithmetic operations to execute the full or partial data flows of DSP applications. The proposed reconfigurable computation unit (RCU) can be used as a coprocessing unit or an arithmetic unit in general-propose processors. The experimental results are indicated that the maximum operation frequency of the RCU is 50.73MHz, which is faster than a normal 32-bit booth multiplier.

Original languageEnglish
Title of host publicationProceedings - IEEE Computer Society Annual Symposium on VLSI
Subtitle of host publicationEmerging VLSI Technologies and Architectures
Pages439-444
Number of pages6
DOIs
Publication statusPublished - 2007 Nov 28
EventIEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, ISVLSI'07 - Porto Alegre, Brazil
Duration: 2007 Mar 92007 Mar 11

Publication series

NameProceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures

Other

OtherIEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, ISVLSI'07
CountryBrazil
CityPorto Alegre
Period07-03-0907-03-11

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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