A pipelined IP forwarding engine with fast update

Yeim Kuan Chang, Yen Cheng Liu, Fang Chen Kuo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

IP address lookup is one of the most important functionalities in the router design. To meet the requirements in high speed routers consisting of linecards with 40Gbps transfer rates, researchers usually take lookup/update speed, storage requirement, and scalability into consideration when designing a high performance forwarding engine. As a result, hardwarebased solutions are often used to develop a high speed router nowadays. In this paper, we develop a FPGAbased pipelined forwarding engine which focuses on reducing the update overhead. The proposed scheme partitions the routing table into several disjoint groups. The prefix which resides in the same group is interleaving stored into several memory modules to ensure the parallel comparison at the comparison stage. With the pipeline enabled, the throughput of the design can achieve the speed of OC-768. The update overhead can also be reduced.

Original languageEnglish
Title of host publicationProceedings - 2009 International Conference on Advanced Information Networking and Applications, AINA 2009
Pages263-269
Number of pages7
DOIs
Publication statusPublished - 2009
Event2009 International Conference on Advanced Information Networking and Applications, AINA 2009 - Bradford, United Kingdom
Duration: 2009 May 262009 May 29

Publication series

NameProceedings - International Conference on Advanced Information Networking and Applications, AINA
ISSN (Print)1550-445X

Other

Other2009 International Conference on Advanced Information Networking and Applications, AINA 2009
Country/TerritoryUnited Kingdom
CityBradford
Period09-05-2609-05-29

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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