A new planarized trench isolation technique for GaAs devices fabrication by a liquid phase chemical-enhanced oxidation (LPCEO) method is proposed. The LPCEO-trench-isolation technique can be operated at low temperature with a simple and low-cost process. As compared with conventional mesa isolation, the LPCEO-trench-isolation can provide better planarity and isolation properties. Finally, GaAs MOSFET's fabricated with LPCEO-trench-isolation and selective oxidized gate both by the LPCEO method are demonstrated.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering