TY - GEN
T1 - A power-efficient pulse-based in-situ timing error predictor for PVT-variation sensitive circuits
AU - Chiou, Lih-Yih
AU - Huang, Chi Ray
AU - Wu, Ming Hung
PY - 2014/1/1
Y1 - 2014/1/1
N2 - Adaptive design is one of the most promising approaches for mitigating the large design margin used by dynamically scaling the supply voltage and frequency of integrated circuits. A low cost and power efficient variation detection circuit is one of the critical components intended to achieve the goal of adaptive control. In this paper, we proposed a pulse-based timing error prediction mechanism that can minimize safety margins with low design overhead. When compared with the conventional canary-based circuit technique, 28.7% power reduction is achieved under 50% data activity. Moreover, an average of 48.3% power reduction is obtained across different process corners at ultra-low voltage regime as compared to the worst case design.
AB - Adaptive design is one of the most promising approaches for mitigating the large design margin used by dynamically scaling the supply voltage and frequency of integrated circuits. A low cost and power efficient variation detection circuit is one of the critical components intended to achieve the goal of adaptive control. In this paper, we proposed a pulse-based timing error prediction mechanism that can minimize safety margins with low design overhead. When compared with the conventional canary-based circuit technique, 28.7% power reduction is achieved under 50% data activity. Moreover, an average of 48.3% power reduction is obtained across different process corners at ultra-low voltage regime as compared to the worst case design.
UR - http://www.scopus.com/inward/record.url?scp=84907412293&partnerID=8YFLogxK
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U2 - 10.1109/ISCAS.2014.6865360
DO - 10.1109/ISCAS.2014.6865360
M3 - Conference contribution
AN - SCOPUS:84907412293
SN - 9781479934324
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 1215
EP - 1218
BT - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
Y2 - 1 June 2014 through 5 June 2014
ER -