A power estimation methodology for SystemC transaction level models

Nagu Dhanwada, Ing Chao Lin, Vijay Narayanan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

59 Citations (Scopus)

Abstract

Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With the presence of complex cores in current day embedded system-on-chip devices, the problem of complete system level power estimation is gaining significance. Transaction level models for SoCs are gaining increasing attention with emerging architectural modeling standards like SystemC. In this paper we present a methodology for performing system power estimation for different scenarios or applications being executed on these transaction level models. We describe techniques and a setup for transaction level power characterization, and an approach to augment SystemC transaction level models to perform transaction level power estimation. We also present experimental results to validate the accuracy and speed of our approach.

Original languageEnglish
Title of host publicationCODES+ISSS 2005 - International Conference on Hardware/Software Codesign and Systems Synthesis
PublisherAssociation for Computing Machinery
Pages142-147
Number of pages6
ISBN (Print)1595931619, 9781595931610
DOIs
Publication statusPublished - 2005 Jan 1
Event3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis CODES+ISSS 2005 - Jersey City, NJ, United States
Duration: 2005 Sep 182005 Sep 21

Publication series

NameCODES+ISSS 2005 - International Conference on Hardware/Software Codesign and System Synthesis

Other

Other3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis CODES+ISSS 2005
CountryUnited States
CityJersey City, NJ
Period05-09-1805-09-21

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Fingerprint Dive into the research topics of 'A power estimation methodology for SystemC transaction level models'. Together they form a unique fingerprint.

Cite this