A predictive resistive RAM compact model with synaptic behavior for circuit simulations

Jia Wei Lee, Chun Hsiang Hsu, Meng-Hsueh Chiang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

As one of the promising candidates of next generation memory, resistive random access memory (RRAM) does not only show good storage capability but also potential of neuromorphic operation. In this paper we introduce a compact model that could predict the bipolar switching behavior of RRAM, and the conductance of low resistance state is programmable which could mimic the synapse behavior. Design insight based on the synaptic plasticity is provided as well.

Original languageEnglish
Title of host publicationTechConnect Briefs 2018 - Informatics, Electronics and Microsystems
EditorsMatthew Laudon, Fiona Case, Bart Romanowicz, Fiona Case
PublisherTechConnect
Pages232-235
Number of pages4
Volume4
ISBN (Electronic)9780998878256
Publication statusPublished - 2018 Jan 1
Event11th Annual TechConnect World Innovation Conference and Expo, Held Jointly with the 20th Annual Nanotech Conference and Expo,the 2018 SBIR/STTR Spring Innovation Conference, and the Defense TechConnect DTC Spring Conference - Anaheim, United States
Duration: 2018 May 132018 May 16

Other

Other11th Annual TechConnect World Innovation Conference and Expo, Held Jointly with the 20th Annual Nanotech Conference and Expo,the 2018 SBIR/STTR Spring Innovation Conference, and the Defense TechConnect DTC Spring Conference
CountryUnited States
CityAnaheim
Period18-05-1318-05-16

Fingerprint

Circuit simulation
Data storage equipment
Plasticity
RRAM

All Science Journal Classification (ASJC) codes

  • Materials Science(all)

Cite this

Lee, J. W., Hsu, C. H., & Chiang, M-H. (2018). A predictive resistive RAM compact model with synaptic behavior for circuit simulations. In M. Laudon, F. Case, B. Romanowicz, & F. Case (Eds.), TechConnect Briefs 2018 - Informatics, Electronics and Microsystems (Vol. 4, pp. 232-235). TechConnect.
Lee, Jia Wei ; Hsu, Chun Hsiang ; Chiang, Meng-Hsueh. / A predictive resistive RAM compact model with synaptic behavior for circuit simulations. TechConnect Briefs 2018 - Informatics, Electronics and Microsystems. editor / Matthew Laudon ; Fiona Case ; Bart Romanowicz ; Fiona Case. Vol. 4 TechConnect, 2018. pp. 232-235
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Lee, JW, Hsu, CH & Chiang, M-H 2018, A predictive resistive RAM compact model with synaptic behavior for circuit simulations. in M Laudon, F Case, B Romanowicz & F Case (eds), TechConnect Briefs 2018 - Informatics, Electronics and Microsystems. vol. 4, TechConnect, pp. 232-235, 11th Annual TechConnect World Innovation Conference and Expo, Held Jointly with the 20th Annual Nanotech Conference and Expo,the 2018 SBIR/STTR Spring Innovation Conference, and the Defense TechConnect DTC Spring Conference, Anaheim, United States, 18-05-13.

A predictive resistive RAM compact model with synaptic behavior for circuit simulations. / Lee, Jia Wei; Hsu, Chun Hsiang; Chiang, Meng-Hsueh.

TechConnect Briefs 2018 - Informatics, Electronics and Microsystems. ed. / Matthew Laudon; Fiona Case; Bart Romanowicz; Fiona Case. Vol. 4 TechConnect, 2018. p. 232-235.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Lee JW, Hsu CH, Chiang M-H. A predictive resistive RAM compact model with synaptic behavior for circuit simulations. In Laudon M, Case F, Romanowicz B, Case F, editors, TechConnect Briefs 2018 - Informatics, Electronics and Microsystems. Vol. 4. TechConnect. 2018. p. 232-235