Abstract
We propose an embedded processor-based built-in self-repair (BISR) design for embedded memories. In the proposed design we reuse the embedded processor that can be found on almost every system-on-chip (SOC) product, in addition to many distinct features. By reusing the embedded processor, the controller and redundancy analysis circuit of a typical BISR design can be removed. Also, the test algorithm and redundancy analysis/allocation algorithm are easily programmable, greatly increasing the design flexibility. We also have developed a memory wrapper that allows at-speed testing of the memory cores. The area overhead of the proposed BISR scheme is low, since only the memory wrapper needs to be realized explicitly. Our experiments show that the BISR area overhead for a typical 8Kx32 SRAM is lower than 1%.
| Original language | English |
|---|---|
| Title of host publication | Proceedings - 12th Asian Test Symposium, ATS 2003 |
| Publisher | IEEE Computer Society |
| Pages | 366-371 |
| Number of pages | 6 |
| ISBN (Electronic) | 0769519512 |
| DOIs | |
| Publication status | Published - 2003 Jan 1 |
| Event | 12th Asian Test Symposium, ATS 2003 - Xi'an, China Duration: 2003 Nov 16 → 2003 Nov 19 |
Publication series
| Name | Proceedings of the Asian Test Symposium |
|---|---|
| Volume | 2003-January |
| ISSN (Print) | 1081-7735 |
Other
| Other | 12th Asian Test Symposium, ATS 2003 |
|---|---|
| Country | China |
| City | Xi'an |
| Period | 03-11-16 → 03-11-19 |
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All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
Cite this
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A processor-based built-in self-repair design for embedded memories. / Su, Chin Lung; Huang, Rei Fu; Wu, Cheng Wen.
Proceedings - 12th Asian Test Symposium, ATS 2003. IEEE Computer Society, 2003. p. 366-371 1250838 (Proceedings of the Asian Test Symposium; Vol. 2003-January).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - A processor-based built-in self-repair design for embedded memories
AU - Su, Chin Lung
AU - Huang, Rei Fu
AU - Wu, Cheng Wen
PY - 2003/1/1
Y1 - 2003/1/1
N2 - We propose an embedded processor-based built-in self-repair (BISR) design for embedded memories. In the proposed design we reuse the embedded processor that can be found on almost every system-on-chip (SOC) product, in addition to many distinct features. By reusing the embedded processor, the controller and redundancy analysis circuit of a typical BISR design can be removed. Also, the test algorithm and redundancy analysis/allocation algorithm are easily programmable, greatly increasing the design flexibility. We also have developed a memory wrapper that allows at-speed testing of the memory cores. The area overhead of the proposed BISR scheme is low, since only the memory wrapper needs to be realized explicitly. Our experiments show that the BISR area overhead for a typical 8Kx32 SRAM is lower than 1%.
AB - We propose an embedded processor-based built-in self-repair (BISR) design for embedded memories. In the proposed design we reuse the embedded processor that can be found on almost every system-on-chip (SOC) product, in addition to many distinct features. By reusing the embedded processor, the controller and redundancy analysis circuit of a typical BISR design can be removed. Also, the test algorithm and redundancy analysis/allocation algorithm are easily programmable, greatly increasing the design flexibility. We also have developed a memory wrapper that allows at-speed testing of the memory cores. The area overhead of the proposed BISR scheme is low, since only the memory wrapper needs to be realized explicitly. Our experiments show that the BISR area overhead for a typical 8Kx32 SRAM is lower than 1%.
UR - http://www.scopus.com/inward/record.url?scp=84954455193&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84954455193&partnerID=8YFLogxK
U2 - 10.1109/ATS.2003.1250838
DO - 10.1109/ATS.2003.1250838
M3 - Conference contribution
AN - SCOPUS:84954455193
T3 - Proceedings of the Asian Test Symposium
SP - 366
EP - 371
BT - Proceedings - 12th Asian Test Symposium, ATS 2003
PB - IEEE Computer Society
ER -