A process/physics-based compact model for nonclassical CMOS device and circuit design

J. G. Fossum, L. Ge, Meng-Hsueh Chiang, V. P. Trivedi, M. M. Chowdhury, L. Mathew, G. O. Workman, B. Y. Nguyen

Research output: Contribution to journalArticle

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Abstract

A process/physics-based compact model (UFDG) for nonclassical MOSFETs having ultra-thin Si bodies (UTB) is overviewed. The model, in essence, is a compact Poisson-Schrödinger solver, including accountings for short-channel effects, and is applicable to nanoscale fully depleted (FD) SOI MOSFETs as well as generic double-gate (DG) devices. The utility of UFDG in nonclassical CMOS device design, as well as circuit design, is stressed, and demonstrated by using it in Spice3 to design UTB MOSFETs and to project extremely scaled DG and FD/SOI CMOS performances. Also, calibration of UFDG to fabricated FinFETs yields new physical insights about these potentially viable nanoscale DG devices, and about model requirements for them.

Original languageEnglish
Pages (from-to)919-926
Number of pages8
JournalSolid-State Electronics
Volume48
Issue number6
DOIs
Publication statusPublished - 2004 Jun 1

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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    Fossum, J. G., Ge, L., Chiang, M-H., Trivedi, V. P., Chowdhury, M. M., Mathew, L., Workman, G. O., & Nguyen, B. Y. (2004). A process/physics-based compact model for nonclassical CMOS device and circuit design. Solid-State Electronics, 48(6), 919-926. https://doi.org/10.1016/j.sse.2003.12.030