A programmable data background generator for march based memory testing

Wei Lun Wang, Kuen-Jong Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Due to the short test time and high fault coverage, march algorithms have been widely used to test the SRAM and DRAM memory chips and cores in a system-on-chip (SOC). To raise the fault coverage of the word-oriented memories (WOMs), distinct data backgrounds of the march algorithms are required. In this paper we have integrated two kinds of data background generators into a single design in the built-in self-test (BIST) environment. The proposed data background generator can generate different sizes and different kinds of data backgrounds for testing the WOMs. It is shown that the design is easily programmable with very little external control. Also when combined with the existing data register in the memory, the hardware overhead is quite small.

Original languageEnglish
Title of host publication2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages347-350
Number of pages4
ISBN (Electronic)0780373634, 9780780373631
DOIs
Publication statusPublished - 2002 Jan 1
Event3rd IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Taipei, Taiwan
Duration: 2002 Aug 62002 Aug 8

Publication series

Name2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings

Other

Other3rd IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002
CountryTaiwan
CityTaipei
Period02-08-0602-08-08

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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