A programmable data background generator for march based memory testing

Wei Lun Wang; Kuen-Jong Lee

doi:10.1109/APASIC.2002.1031603

A programmable data background generator for march based memory testing

Wei Lun Wang, Kuen-Jong Lee

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

Due to the short test time and high fault coverage, march algorithms have been widely used to test the SRAM and DRAM memory chips and cores in a system-on-chip (SOC). To raise the fault coverage of the word-oriented memories (WOMs), distinct data backgrounds of the march algorithms are required. In this paper we have integrated two kinds of data background generators into a single design in the built-in self-test (BIST) environment. The proposed data background generator can generate different sizes and different kinds of data backgrounds for testing the WOMs. It is shown that the design is easily programmable with very little external control. Also when combined with the existing data register in the memory, the hardware overhead is quite small.

Original language	English
Title of host publication	2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	347-350
Number of pages	4
ISBN (Electronic)	0780373634, 9780780373631
DOIs	https://doi.org/10.1109/APASIC.2002.1031603
Publication status	Published - 2002 Jan 1
Event	3rd IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Taipei, Taiwan Duration: 2002 Aug 6 → 2002 Aug 8

Publication series

Name	2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings

Other

Other	3rd IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002
Country/Territory	Taiwan
City	Taipei
Period	02-08-06 → 02-08-08

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/APASIC.2002.1031603

Cite this

Wang, W. L., & Lee, K.-J. (2002). A programmable data background generator for march based memory testing. In 2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings (pp. 347-350). Article 1031603 (2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APASIC.2002.1031603

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abstract = "Due to the short test time and high fault coverage, march algorithms have been widely used to test the SRAM and DRAM memory chips and cores in a system-on-chip (SOC). To raise the fault coverage of the word-oriented memories (WOMs), distinct data backgrounds of the march algorithms are required. In this paper we have integrated two kinds of data background generators into a single design in the built-in self-test (BIST) environment. The proposed data background generator can generate different sizes and different kinds of data backgrounds for testing the WOMs. It is shown that the design is easily programmable with very little external control. Also when combined with the existing data register in the memory, the hardware overhead is quite small.",

author = "Wang, {Wei Lun} and Kuen-Jong Lee",

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note = "3rd IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 ; Conference date: 06-08-2002 Through 08-08-2002",

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Wang, WL & Lee, K-J 2002, A programmable data background generator for march based memory testing. in 2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings., 1031603, 2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings, Institute of Electrical and Electronics Engineers Inc., pp. 347-350, 3rd IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002, Taipei, Taiwan, 02-08-06. https://doi.org/10.1109/APASIC.2002.1031603

A programmable data background generator for march based memory testing. / Wang, Wei Lun; Lee, Kuen-Jong.
2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2002. p. 347-350 1031603 (2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - Due to the short test time and high fault coverage, march algorithms have been widely used to test the SRAM and DRAM memory chips and cores in a system-on-chip (SOC). To raise the fault coverage of the word-oriented memories (WOMs), distinct data backgrounds of the march algorithms are required. In this paper we have integrated two kinds of data background generators into a single design in the built-in self-test (BIST) environment. The proposed data background generator can generate different sizes and different kinds of data backgrounds for testing the WOMs. It is shown that the design is easily programmable with very little external control. Also when combined with the existing data register in the memory, the hardware overhead is quite small.

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A programmable data background generator for march based memory testing

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