This paper presents a prototype fabrication and verification on a dual CAN bus system for digital avionics in small aircraft systems. It is extending from a preliminary single CAN-bus study. The proposed dual data bus integrates CAN plus TTP to enhance system performance. For the proposed dual bus avionics, new circuit designs using hardware selector and memory mapping technique are discussed. The system CPU load using hardware selector is much less than the memory mapping by software. Circuit board fabrication and test is verified and extended into PC controlled performance. In the tests, a primary flight display suitable for small aircraft transportation system application is constructed with several functions for terminal data exchange control. Each node will be connected to real instruments or sensors, as well as several simulated signals. In the dual bus IP board design, two configurations by software are considered for different integration requirements. This prototype dual CAN bus system is also performed to verify characteristic enhancement in system reliability and stability. Dual bus avionics, Controller area node (CAN), Time trigger protocol (TTP), Small air craft transportation system (SATS), System hardware and software.