TY - JOUR
T1 - A reconfigurable modular fault tolerant generalized Boolean n-cube network
AU - Yang, Chu-Sing
AU - Wu, S. Y.
AU - Huang, K. C.
PY - 1991/1/1
Y1 - 1991/1/1
N2 - A fault tolerant modular architecture for generalized Boolean n-cube network is presented. In this approach, each module consists of 2α original processors (nodes) and one spare processor (node), for 0≤α≤n-1. The spare processor can replace each of the original processors within the same module. Thus, each module can tolerate one fault and the system can tolerante several faults if they are located in different modules. And then, a distributed fault tolerant routing algorithm is proposed. When a message destined to a faulty processor will be delivered to the spare that replaces the faulty processor. Finally, we show that the architecture can achieve very high reliability.
AB - A fault tolerant modular architecture for generalized Boolean n-cube network is presented. In this approach, each module consists of 2α original processors (nodes) and one spare processor (node), for 0≤α≤n-1. The spare processor can replace each of the original processors within the same module. Thus, each module can tolerate one fault and the system can tolerante several faults if they are located in different modules. And then, a distributed fault tolerant routing algorithm is proposed. When a message destined to a faulty processor will be delivered to the spare that replaces the faulty processor. Finally, we show that the architecture can achieve very high reliability.
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U2 - 10.1016/0165-6074(91)90406-J
DO - 10.1016/0165-6074(91)90406-J
M3 - Article
AN - SCOPUS:0026204334
SN - 0165-6074
VL - 32
SP - 589
EP - 592
JO - Microprocessing and Microprogramming
JF - Microprocessing and Microprogramming
IS - 1-5
ER -