A Reconfigurable Transient Optimizer Applied to a Four-Phase Buck Converter for Optimizing Both DVS and Load Transient Responses

Pai Yi Wang, Yi Wei Huang, Tai Haur Kuo

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Abstract

This brief presents a reconfigurable transient optimizer (RTO) applied to a four-phase buck converter for optimizing both dynamic-voltage-scaling (DVS) and load transient responses to approach the theoretically minimum output-voltage undershoot { \Delta }\text{V}_{\mathrm{US}} , overshoot { \Delta }\text{V}_{\mathrm{OS}} , and settling time \text{t}_{\mathrm{S}}. The DVS and load transients are instantly detected by a voltage sensor and calibrated capacitor-current sensor, respectively. When a large DVS or load transient occurs, the RTO enables all four phases, reconfigures its circuit architecture, and controls the optimal ON-OFF times of the power switches, thereby settling the output voltage in a single ON-OFF switching with { \Delta }\text{V}_{\mathrm{US}} , { \Delta }\text{V}_{\mathrm{OS}} , and \text{t}_{\mathrm{S}} close to their respective theoretical minima. The converter is fabricated in a 0.18- {\mu }\text{m} CMOS process with a 2.3-mm2 chip area. For a 1-to-1.8 V (1.8-to-1 V) DVS transient, the measured { \Delta }\text{V}_{\mathrm{OS}} ( { \Delta }\text{V}_{\mathrm{US}} ) is not observable, while the measured \text{t}_{\mathrm{S}} is 182 ns (192 ns). For a 1.8-A step-up (step-down) load transient, the measured { \Delta }\text{V}_{\mathrm{US}} ( { \Delta }\text{V}_{\mathrm{OS}} ) and \text{t}_{\mathrm{S}} are 56 mV (45 mV) and 85 ns (76 ns), respectively. Compared with other state-of-the-arts, this brief's \text{t}_{\mathrm{S}} in the DVS transient response is the closest to its theoretical minimum, while the ratios of { \Delta }\text{V}_{\mathrm{US}} , { \Delta }\text{V}_{\mathrm{OS}} , and \text{t}_{\mathrm{S}} to their respective theoretical minima in the load transient response are comparable.

Original languageEnglish
Article number8664613
Pages (from-to)52-56
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume67
Issue number1
DOIs
Publication statusPublished - 2020 Jan

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Transient analysis
Electric potential
Sensors
Voltage scaling
Capacitors
Switches
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

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title = "A Reconfigurable Transient Optimizer Applied to a Four-Phase Buck Converter for Optimizing Both DVS and Load Transient Responses",
abstract = "This brief presents a reconfigurable transient optimizer (RTO) applied to a four-phase buck converter for optimizing both dynamic-voltage-scaling (DVS) and load transient responses to approach the theoretically minimum output-voltage undershoot { \Delta }\text{V}_{\mathrm{US}} , overshoot { \Delta }\text{V}_{\mathrm{OS}} , and settling time \text{t}_{\mathrm{S}}. The DVS and load transients are instantly detected by a voltage sensor and calibrated capacitor-current sensor, respectively. When a large DVS or load transient occurs, the RTO enables all four phases, reconfigures its circuit architecture, and controls the optimal ON-OFF times of the power switches, thereby settling the output voltage in a single ON-OFF switching with { \Delta }\text{V}_{\mathrm{US}} , { \Delta }\text{V}_{\mathrm{OS}} , and \text{t}_{\mathrm{S}} close to their respective theoretical minima. The converter is fabricated in a 0.18- {\mu }\text{m} CMOS process with a 2.3-mm2 chip area. For a 1-to-1.8 V (1.8-to-1 V) DVS transient, the measured { \Delta }\text{V}_{\mathrm{OS}} ( { \Delta }\text{V}_{\mathrm{US}} ) is not observable, while the measured \text{t}_{\mathrm{S}} is 182 ns (192 ns). For a 1.8-A step-up (step-down) load transient, the measured { \Delta }\text{V}_{\mathrm{US}} ( { \Delta }\text{V}_{\mathrm{OS}} ) and \text{t}_{\mathrm{S}} are 56 mV (45 mV) and 85 ns (76 ns), respectively. Compared with other state-of-the-arts, this brief's \text{t}_{\mathrm{S}} in the DVS transient response is the closest to its theoretical minimum, while the ratios of { \Delta }\text{V}_{\mathrm{US}} , { \Delta }\text{V}_{\mathrm{OS}} , and \text{t}_{\mathrm{S}} to their respective theoretical minima in the load transient response are comparable.",
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N2 - This brief presents a reconfigurable transient optimizer (RTO) applied to a four-phase buck converter for optimizing both dynamic-voltage-scaling (DVS) and load transient responses to approach the theoretically minimum output-voltage undershoot { \Delta }\text{V}_{\mathrm{US}} , overshoot { \Delta }\text{V}_{\mathrm{OS}} , and settling time \text{t}_{\mathrm{S}}. The DVS and load transients are instantly detected by a voltage sensor and calibrated capacitor-current sensor, respectively. When a large DVS or load transient occurs, the RTO enables all four phases, reconfigures its circuit architecture, and controls the optimal ON-OFF times of the power switches, thereby settling the output voltage in a single ON-OFF switching with { \Delta }\text{V}_{\mathrm{US}} , { \Delta }\text{V}_{\mathrm{OS}} , and \text{t}_{\mathrm{S}} close to their respective theoretical minima. The converter is fabricated in a 0.18- {\mu }\text{m} CMOS process with a 2.3-mm2 chip area. For a 1-to-1.8 V (1.8-to-1 V) DVS transient, the measured { \Delta }\text{V}_{\mathrm{OS}} ( { \Delta }\text{V}_{\mathrm{US}} ) is not observable, while the measured \text{t}_{\mathrm{S}} is 182 ns (192 ns). For a 1.8-A step-up (step-down) load transient, the measured { \Delta }\text{V}_{\mathrm{US}} ( { \Delta }\text{V}_{\mathrm{OS}} ) and \text{t}_{\mathrm{S}} are 56 mV (45 mV) and 85 ns (76 ns), respectively. Compared with other state-of-the-arts, this brief's \text{t}_{\mathrm{S}} in the DVS transient response is the closest to its theoretical minimum, while the ratios of { \Delta }\text{V}_{\mathrm{US}} , { \Delta }\text{V}_{\mathrm{OS}} , and \text{t}_{\mathrm{S}} to their respective theoretical minima in the load transient response are comparable.

AB - This brief presents a reconfigurable transient optimizer (RTO) applied to a four-phase buck converter for optimizing both dynamic-voltage-scaling (DVS) and load transient responses to approach the theoretically minimum output-voltage undershoot { \Delta }\text{V}_{\mathrm{US}} , overshoot { \Delta }\text{V}_{\mathrm{OS}} , and settling time \text{t}_{\mathrm{S}}. The DVS and load transients are instantly detected by a voltage sensor and calibrated capacitor-current sensor, respectively. When a large DVS or load transient occurs, the RTO enables all four phases, reconfigures its circuit architecture, and controls the optimal ON-OFF times of the power switches, thereby settling the output voltage in a single ON-OFF switching with { \Delta }\text{V}_{\mathrm{US}} , { \Delta }\text{V}_{\mathrm{OS}} , and \text{t}_{\mathrm{S}} close to their respective theoretical minima. The converter is fabricated in a 0.18- {\mu }\text{m} CMOS process with a 2.3-mm2 chip area. For a 1-to-1.8 V (1.8-to-1 V) DVS transient, the measured { \Delta }\text{V}_{\mathrm{OS}} ( { \Delta }\text{V}_{\mathrm{US}} ) is not observable, while the measured \text{t}_{\mathrm{S}} is 182 ns (192 ns). For a 1.8-A step-up (step-down) load transient, the measured { \Delta }\text{V}_{\mathrm{US}} ( { \Delta }\text{V}_{\mathrm{OS}} ) and \text{t}_{\mathrm{S}} are 56 mV (45 mV) and 85 ns (76 ns), respectively. Compared with other state-of-the-arts, this brief's \text{t}_{\mathrm{S}} in the DVS transient response is the closest to its theoretical minimum, while the ratios of { \Delta }\text{V}_{\mathrm{US}} , { \Delta }\text{V}_{\mathrm{OS}} , and \text{t}_{\mathrm{S}} to their respective theoretical minima in the load transient response are comparable.

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