A self-testing and calibration method for embedded successive approximation register ADC

Xuan Lun Huang; Ping Ying Kang; Hsiu Ming Chang; Jiun Lang Huang; Yung Fa Chou; Yung Pin Lee; Ding Ming Kwai; Cheng Wen Wu

doi:10.1109/ASPDAC.2011.5722279

A self-testing and calibration method for embedded successive approximation register ADC

Xuan Lun Huang, Ping Ying Kang, Hsiu Ming Chang, Jiun Lang Huang, Yung Fa Chou, Yung Pin Lee, Ding Ming Kwai, Cheng Wen Wu

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

11 Citations (Scopus)

Abstract

This paper presents a self-testing and calibration method for the embedded successive approximation register (SAR) analog-to-digital converter (ADC). We first propose a low cost design-for-test (DfT) technique which tests a SAR ADC by characterizing its digital-to-analog converter (DAC) capacitor array. Utilizing DAC major carrier transition testing, the required analog measurement range is just 4 LSBs; this significantly lowers the test circuitry complexity. Then, we develop a fully-digital missing code calibration technique that utilizes the proposed testing scheme to collect the required calibration information. Simulation results are presented to validate the proposed technique.

Original language	English
Title of host publication	2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011
Pages	713-718
Number of pages	6
DOIs	https://doi.org/10.1109/ASPDAC.2011.5722279
Publication status	Published - 2011 Mar 28
Event	2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011 - Yokohama, Japan Duration: 2011 Jan 25 → 2011 Jan 28

Publication series

Name	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

Other	2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011
Country/Territory	Japan
City	Yokohama
Period	11-01-25 → 11-01-28

All Science Journal Classification (ASJC) codes

Computer Science Applications
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering

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10.1109/ASPDAC.2011.5722279

Cite this

Huang, X. L., Kang, P. Y., Chang, H. M., Huang, J. L., Chou, Y. F., Lee, Y. P., Kwai, D. M., & Wu, C. W. (2011). A self-testing and calibration method for embedded successive approximation register ADC. In 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011 (pp. 713-718). [5722279] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2011.5722279

Huang, Xuan Lun ; Kang, Ping Ying ; Chang, Hsiu Ming ; Huang, Jiun Lang ; Chou, Yung Fa ; Lee, Yung Pin ; Kwai, Ding Ming ; Wu, Cheng Wen. / A self-testing and calibration method for embedded successive approximation register ADC. 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. 2011. pp. 713-718 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

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abstract = "This paper presents a self-testing and calibration method for the embedded successive approximation register (SAR) analog-to-digital converter (ADC). We first propose a low cost design-for-test (DfT) technique which tests a SAR ADC by characterizing its digital-to-analog converter (DAC) capacitor array. Utilizing DAC major carrier transition testing, the required analog measurement range is just 4 LSBs; this significantly lowers the test circuitry complexity. Then, we develop a fully-digital missing code calibration technique that utilizes the proposed testing scheme to collect the required calibration information. Simulation results are presented to validate the proposed technique.",

author = "Huang, {Xuan Lun} and Kang, {Ping Ying} and Chang, {Hsiu Ming} and Huang, {Jiun Lang} and Chou, {Yung Fa} and Lee, {Yung Pin} and Kwai, {Ding Ming} and Wu, {Cheng Wen}",

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note = "2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011 ; Conference date: 25-01-2011 Through 28-01-2011",

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Huang, XL, Kang, PY, Chang, HM, Huang, JL, Chou, YF, Lee, YP, Kwai, DM & Wu, CW 2011, A self-testing and calibration method for embedded successive approximation register ADC. in 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011., 5722279, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 713-718, 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011, Yokohama, Japan, 11-01-25. https://doi.org/10.1109/ASPDAC.2011.5722279

A self-testing and calibration method for embedded successive approximation register ADC. / Huang, Xuan Lun; Kang, Ping Ying; Chang, Hsiu Ming; Huang, Jiun Lang; Chou, Yung Fa; Lee, Yung Pin; Kwai, Ding Ming; Wu, Cheng Wen.

2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. 2011. p. 713-718 5722279 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - This paper presents a self-testing and calibration method for the embedded successive approximation register (SAR) analog-to-digital converter (ADC). We first propose a low cost design-for-test (DfT) technique which tests a SAR ADC by characterizing its digital-to-analog converter (DAC) capacitor array. Utilizing DAC major carrier transition testing, the required analog measurement range is just 4 LSBs; this significantly lowers the test circuitry complexity. Then, we develop a fully-digital missing code calibration technique that utilizes the proposed testing scheme to collect the required calibration information. Simulation results are presented to validate the proposed technique.

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Huang XL, Kang PY, Chang HM, Huang JL, Chou YF, Lee YP et al. A self-testing and calibration method for embedded successive approximation register ADC. In 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. 2011. p. 713-718. 5722279. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2011.5722279

A self-testing and calibration method for embedded successive approximation register ADC

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