A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications

C. H. Lin, H. Z. Liu, H. K. Huang, C. K. Chu, M. P. Houng, Y. H. Wang, C. C. Liu, C. H. Chang, C. L. Wu, C. S. Chang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A single supply, fully matched high linearity 2W power amplifier utilizing the gate zero-bias power PHEMT technology is developed for 5.8GHz WLAN applications. At Vgs= 0 V, Vds=5 V, the power amplifier with 33dBm of peak P1dB, 25% of PAE, 12.8dB small-signal gain can be seen. Moreover, high-linearity with 43dBm third-order intercept point at a single carrier output power level of 23dBm is also achieved.

Original languageEnglish
Title of host publication2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages191-194
Number of pages4
ISBN (Print)0780393392, 9780780393394
DOIs
Publication statusPublished - 2005 Jan 1
Event2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC - Howloon, Hong Kong
Duration: 2005 Dec 192005 Dec 21

Publication series

Name2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

Other

Other2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
CountryHong Kong
CityHowloon
Period05-12-1905-12-21

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All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Lin, C. H., Liu, H. Z., Huang, H. K., Chu, C. K., Houng, M. P., Wang, Y. H., ... Chang, C. S. (2005). A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications. In 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC (pp. 191-194). [1635238] (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2005.1635238