A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications

C. H. Lin; H. Z. Liu; H. K. Huang; C. K. Chu; M. P. Houng; Y. H. Wang; C. C. Liu; C. H. Chang; C. L. Wu; C. S. Chang

doi:10.1109/EDSSC.2005.1635238

A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications

C. H. Lin
, H. Z. Liu
, H. K. Huang
, C. K. Chu
, M. P. Houng
, Y. H. Wang
, C. C. Liu
, C. H. Chang
, C. L. Wu
, C. S. Chang

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A single supply, fully matched high linearity 2W power amplifier utilizing the gate zero-bias power PHEMT technology is developed for 5.8GHz WLAN applications. At Vgs= 0 V, Vds=5 V, the power amplifier with 33dBm of peak P_1dB, 25% of PAE, 12.8dB small-signal gain can be seen. Moreover, high-linearity with 43dBm third-order intercept point at a single carrier output power level of 23dBm is also achieved.

Original language	English
Title of host publication	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	191-194
Number of pages	4
ISBN (Print)	0780393392, 9780780393394
DOIs	https://doi.org/10.1109/EDSSC.2005.1635238
Publication status	Published - 2005 Jan 1
Event	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC - Howloon, Hong Kong Duration: 2005 Dec 19 → 2005 Dec 21

Publication series

Name	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

Other

Other	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
Country/Territory	Hong Kong
City	Howloon
Period	05-12-19 → 05-12-21

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Access to Document

10.1109/EDSSC.2005.1635238

Cite this

Lin, C. H., Liu, H. Z., Huang, H. K., Chu, C. K., Houng, M. P., Wang, Y. H., Liu, C. C., Chang, C. H., Wu, C. L., & Chang, C. S. (2005). A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications. In 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC (pp. 191-194). Article 1635238 (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2005.1635238

@inproceedings{60907a8d19a04bb787fa91c9fa7f43c3,

title = "A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications",

abstract = "A single supply, fully matched high linearity 2W power amplifier utilizing the gate zero-bias power PHEMT technology is developed for 5.8GHz WLAN applications. At Vgs= 0 V, Vds=5 V, the power amplifier with 33dBm of peak P1dB, 25\% of PAE, 12.8dB small-signal gain can be seen. Moreover, high-linearity with 43dBm third-order intercept point at a single carrier output power level of 23dBm is also achieved.",

author = "Lin, \{C. H.\} and Liu, \{H. Z.\} and Huang, \{H. K.\} and Chu, \{C. K.\} and Houng, \{M. P.\} and Wang, \{Y. H.\} and Liu, \{C. C.\} and Chang, \{C. H.\} and Wu, \{C. L.\} and Chang, \{C. S.\}",

year = "2005",

month = jan,

day = "1",

doi = "10.1109/EDSSC.2005.1635238",

language = "English",

isbn = "0780393392",

series = "2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "191--194",

booktitle = "2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC",

address = "United States",

note = "2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC ; Conference date: 19-12-2005 Through 21-12-2005",

}

Lin, CH, Liu, HZ, Huang, HK, Chu, CK, Houng, MP, Wang, YH, Liu, CC, Chang, CH, Wu, CL & Chang, CS 2005, A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications. in 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC., 1635238, 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC, Institute of Electrical and Electronics Engineers Inc., pp. 191-194, 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC, Howloon, Hong Kong, 05-12-19. https://doi.org/10.1109/EDSSC.2005.1635238

A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications. / Lin, C. H.; Liu, H. Z.; Huang, H. K. et al.
2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC. Institute of Electrical and Electronics Engineers Inc., 2005. p. 191-194 1635238 (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications

AU - Lin, C. H.

AU - Liu, H. Z.

AU - Huang, H. K.

AU - Chu, C. K.

AU - Houng, M. P.

AU - Wang, Y. H.

AU - Liu, C. C.

AU - Chang, C. H.

AU - Wu, C. L.

AU - Chang, C. S.

PY - 2005/1/1

Y1 - 2005/1/1

N2 - A single supply, fully matched high linearity 2W power amplifier utilizing the gate zero-bias power PHEMT technology is developed for 5.8GHz WLAN applications. At Vgs= 0 V, Vds=5 V, the power amplifier with 33dBm of peak P1dB, 25% of PAE, 12.8dB small-signal gain can be seen. Moreover, high-linearity with 43dBm third-order intercept point at a single carrier output power level of 23dBm is also achieved.

AB - A single supply, fully matched high linearity 2W power amplifier utilizing the gate zero-bias power PHEMT technology is developed for 5.8GHz WLAN applications. At Vgs= 0 V, Vds=5 V, the power amplifier with 33dBm of peak P1dB, 25% of PAE, 12.8dB small-signal gain can be seen. Moreover, high-linearity with 43dBm third-order intercept point at a single carrier output power level of 23dBm is also achieved.

UR - https://www.scopus.com/pages/publications/43549093478

UR - https://www.scopus.com/pages/publications/43549093478#tab=citedBy

U2 - 10.1109/EDSSC.2005.1635238

DO - 10.1109/EDSSC.2005.1635238

M3 - Conference contribution

SN - 0780393392

SN - 9780780393394

T3 - 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

SP - 191

EP - 194

BT - 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

Y2 - 19 December 2005 through 21 December 2005

ER -

Lin CH, Liu HZ, Huang HK, Chu CK, Houng MP, Wang YH et al. A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications. In 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC. Institute of Electrical and Electronics Engineers Inc. 2005. p. 191-194. 1635238. (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). doi: 10.1109/EDSSC.2005.1635238

A single-bias 2W PHEMT MMIC by gate zero-bias technique for C band applications

Abstract

Publication series

Other

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this