A speech codec with a class AB switch-current sigma-delta modulator and an area-efficient decimator/interpolator

Shuenn Yuh Lee, Chih Jen Cheng

Research output: Contribution to conferencePaperpeer-review

Abstract

A speech codec including four main blocks, a class AB switched-current sigma-delta modulator (SDM), a decimator, an interpolator, and a sigma-delta demodulator (SDDM) is presented. In order to achieve low-power consumption and wide dynamic range, a novel class AB switched-current (SI) integrator is adopted to implement the SDM with over-sampling ratio (OSR) of 64. hi addition, design of a reduced-multiplier structure is proposed and applied to the finite impulse response (FIR) filters of the decimator and the interpolator which both of them share the most of hardware in the implementation. Therefore, the number of multipliers and the chip area are reduced. The speech codec was implemented using the TSMC 0.35μm 2P4M standard CMOS process technology. Simulation results with an input of 1kHz sinusoidal wave in the 4 kHz bandwidth show that the speech codec has a maximum signal-to-noise and distortion ratio (SNDR) of 46dB and dynamic range over 65dB with a single 2.5V supply voltage.

Original languageEnglish
Pages41-44
Number of pages4
Publication statusPublished - 2004 Dec 1
Event2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology - Tainan, Taiwan
Duration: 2004 Dec 62004 Dec 9

Other

Other2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology
CountryTaiwan
CityTainan
Period04-12-0604-12-09

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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