A stacked memory device on logic 3D technology for ultra-high-density data storage

Jiyoung Kim; Augustin J. Hong; Sung Min Kim; Kyeong Sik Shin; Emil B. Song; Yongha Hwang; Faxian Xiu; Kosmas Galatsis; Chi On Chui; Rob N. Candler; Siyoung Choi; Joo Tae Moon; Kang L. Wang

doi:10.1088/0957-4484/22/25/254006

A stacked memory device on logic 3D technology for ultra-high-density data storage

Jiyoung Kim, Augustin J. Hong, Sung Min Kim, Kyeong Sik Shin, Emil B. Song, Yongha Hwang, Faxian Xiu, Kosmas Galatsis, Chi On Chui, Rob N. Candler, Siyoung Choi, Joo Tae Moon, Kang L. Wang

College of Electrical Engineering and Computer Science

Research output: Contribution to journal › Article › peer-review

36 Citations (Scopus)

Abstract

We have demonstrated, for the first time, a novel three-dimensional (3D) memory chip architecture of stacked-memory-devices-on-logic (SMOL) achieving up to 95% of cell-area efficiency by directly building up memory devices on top of front-end CMOS devices. In order to realize the SMOL, a unique 3D Flash memory device and vertical integration structure have been successfully developed. The SMOL architecture has great potential to achieve tera-bit level memory density by stacking memory devices vertically and maximizing cell-area efficiency. Furthermore, various emerging devices could replace the 3D memory device to develop new 3D chip architectures.

Original language	English
Article number	254006
Journal	Nanotechnology
Volume	22
Issue number	25
DOIs	https://doi.org/10.1088/0957-4484/22/25/254006
Publication status	Published - 2011 Jun 24

All Science Journal Classification (ASJC) codes

Bioengineering
Chemistry(all)
Materials Science(all)
Mechanics of Materials
Mechanical Engineering
Electrical and Electronic Engineering

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title = "A stacked memory device on logic 3D technology for ultra-high-density data storage",

abstract = "We have demonstrated, for the first time, a novel three-dimensional (3D) memory chip architecture of stacked-memory-devices-on-logic (SMOL) achieving up to 95% of cell-area efficiency by directly building up memory devices on top of front-end CMOS devices. In order to realize the SMOL, a unique 3D Flash memory device and vertical integration structure have been successfully developed. The SMOL architecture has great potential to achieve tera-bit level memory density by stacking memory devices vertically and maximizing cell-area efficiency. Furthermore, various emerging devices could replace the 3D memory device to develop new 3D chip architectures.",

author = "Jiyoung Kim and Hong, {Augustin J.} and Kim, {Sung Min} and Shin, {Kyeong Sik} and Song, {Emil B.} and Yongha Hwang and Faxian Xiu and Kosmas Galatsis and Chui, {Chi On} and Candler, {Rob N.} and Siyoung Choi and Moon, {Joo Tae} and Wang, {Kang L.}",

year = "2011",

month = jun,

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doi = "10.1088/0957-4484/22/25/254006",

language = "English",

volume = "22",

journal = "Nanotechnology",

issn = "0957-4484",

publisher = "IOP Publishing Ltd.",

number = "25",

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A stacked memory device on logic 3D technology for ultra-high-density data storage. / Kim, Jiyoung; Hong, Augustin J.; Kim, Sung Min; Shin, Kyeong Sik; Song, Emil B.; Hwang, Yongha; Xiu, Faxian; Galatsis, Kosmas; Chui, Chi On; Candler, Rob N.; Choi, Siyoung; Moon, Joo Tae; Wang, Kang L.

In: Nanotechnology, Vol. 22, No. 25, 254006, 24.06.2011.

Research output: Contribution to journal › Article › peer-review

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AU - Kim, Jiyoung

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AU - Kim, Sung Min

AU - Shin, Kyeong Sik

AU - Song, Emil B.

AU - Hwang, Yongha

AU - Xiu, Faxian

AU - Galatsis, Kosmas

AU - Chui, Chi On

AU - Candler, Rob N.

AU - Choi, Siyoung

AU - Moon, Joo Tae

AU - Wang, Kang L.

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