Abstract
We have demonstrated, for the first time, a novel three-dimensional (3D) memory chip architecture of stacked-memory-devices-on-logic (SMOL) achieving up to 95% of cell-area efficiency by directly building up memory devices on top of front-end CMOS devices. In order to realize the SMOL, a unique 3D Flash memory device and vertical integration structure have been successfully developed. The SMOL architecture has great potential to achieve tera-bit level memory density by stacking memory devices vertically and maximizing cell-area efficiency. Furthermore, various emerging devices could replace the 3D memory device to develop new 3D chip architectures.
Original language | English |
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Article number | 254006 |
Journal | Nanotechnology |
Volume | 22 |
Issue number | 25 |
DOIs | |
Publication status | Published - 2011 Jun 24 |
All Science Journal Classification (ASJC) codes
- Bioengineering
- Chemistry(all)
- Materials Science(all)
- Mechanics of Materials
- Mechanical Engineering
- Electrical and Electronic Engineering